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Publications of Author

1. Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier
   Few electron devices: towards hybrid CMOS-SET integrated circuits. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:88-93 [Conf]
   
2. Adil Koukab, Catherine Dehollain, Michel J. Declercq
   HSpeedEx: a high-speed extractor for substrate noise analysis in complex mixed signal SOC. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:767-770 [Conf]
   
3. Adil Koukab, Kaustav Banerjee, Michel J. Declercq
   Analysis and optimization of substrate noise coupling in single-chip RF transceiver design. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2002, pp:309-316 [Conf]
   
4. G. Ding, Catherine Dehollain, Michel J. Declercq, Kamran Azadet
   Frequency-interleaving technique for high-speed A/D conversion. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2003, pp:857-860 [Conf]
   
5. R. Kanan, F. Kaess, Michel J. Declercq
   A 640 mW high accuracy 8-bit 1 GHz flash ADC encoder. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 1999, pp:420-423 [Conf]
   
6. F. Kaess, R. Kanan, B. Hochet, Michel J. Declercq
   Performance/power tradeoffs in high-speed GaAs ADCs. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 1999, pp:322-325 [Conf]
   
7. Santanu Mahapatra, Adrian M. Ionescu, Kaustav Banerjee, Michel J. Declercq
   A SET quantizer circuit aiming at digital communication system. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2002, pp:860-863 [Conf]
   
8. Adrian M. Ionescu, V. Pott, R. Fritschi, Kaustav Banerjee, Michel J. Declercq, P. Renaud, C. Hibert, Philippe Flückiger, G. A. Racine
   Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture. [Citation Graph (0, 0)][DBLP]
   ISQED, 2002, pp:496-501 [Conf]
   
9. Yogesh Singh Chauhan, Francois Krummenacher, Renaud Gillon, Benoit Bakeroot, Michel J. Declercq, Adrian M. Ionescu
   A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2007, pp:177-182 [Conf]
   
10. Adil Koukab, Kaustav Banerjee, Michel J. Declercq
    Modeling techniques and verification methodologies for substrate coupling effects in mixed-signal system-on-chip designs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:6, pp:823-836 [Journal]
    
11. 
    Compact Modeling of Suspended Gate FET. [Citation Graph (, )][DBLP]