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Raymond R. Hoare: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle
    An automated, reconfigurable, low-power RFID tag. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:131-136 [Conf]
  2. Gayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones
    A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:309-310 [Conf]
  3. Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle
    A Field Programmable RFID Tag and Associated Design Flow. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:165-174 [Conf]
  4. Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones
    Technology Mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM). [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:299-300 [Conf]
  5. Zhu Ding, Raymond R. Hoare, Alex K. Jones, Dan Li, Shou-Kuo Shao, Shen-Chien Tung, Jiang Zheng, Rami G. Melhem
    Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  6. T. A. Johnson, Raymond R. Hoare
    Cyclical Cascade Chains: A Dynamic Barrier Synchronization Mechanism for Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2001, pp:193- [Conf]
  7. J. W. Schuster, K. Gupta, Raymond R. Hoare
    Speech silicon AM: an FPGA-based acoustic modeling pipeline for hidden Markov model based speech recognition. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  8. Gayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones
    Design space exploration for low-power reconfigurable fabrics. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  9. Ivan S. Kourtev, Raymond R. Hoare, Steven P. Levitan, Tom Cain, Bruce R. Childers, Donald M. Chiarulli, David L. Landis
    Short Courses in System-on-a-Chip (SoC) Design. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:126-127 [Conf]
  10. Raymond R. Hoare, D. Swope, S. Bailey
    A Width Expansion of MMX/SIMD Processing Architecture on an FPGA. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:562-566 [Conf]
  11. Kevin J. Barker, Alan F. Benner, Raymond R. Hoare, Adolfy Hoisie, Alex K. Jones, Darren J. Kerbyson, Dan Li, Rami G. Melhem, Ramakrishnan Rajamony, Eugen Schenfeld, Shuyi Shao, Craig B. Stunkel, Peter Walker
    On the Feasibility of Optical Circuit Switching for High Performance Computing Systems. [Citation Graph (0, 0)][DBLP]
    SC, 2005, pp:16- [Conf]
  12. Zhu Ding, Raymond R. Hoare, Alex K. Jones, Rami G. Melhem
    Interconnect routing and scheduling - Level-wise scheduling algorithm for fat tree interconnection networks. [Citation Graph (0, 0)][DBLP]
    SC, 2006, pp:96- [Conf]
  13. Raymond R. Hoare, Zhu Ding, Alex K. Jones
    Interconnect routing and scheduling - A near-optimal real-time hardware scheduler for large cardinality crossbar switches. [Citation Graph (0, 0)][DBLP]
    SC, 2006, pp:94- [Conf]
  14. Raymond R. Hoare, Zhu Ding, Shen Chih Tung, Rami G. Melhem, Alex K. Jones
    A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2005, v:65, n:10, pp:1237-1252 [Journal]
  15. Alex K. Jones, Raymond R. Hoare, Joseph St. Onge, Joshua M. Lucas, Shuyi Shao, Rami G. Melhem
    Linking Compilation and Visualization for Massively Parallel Programs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]
  16. Ying Yu, Raymond R. Hoare, Alex K. Jones, Ralph Sprang
    A hybrid encoding scheme for efficient single-cycle range matching in content addressable memory. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  17. Gayatri Mehta, Justin Stander, Joshua M. Lucas, Raymond R. Hoare, Brady Hunsaker, Alex K. Jones
    A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:2, pp:148-164 [Journal]

  18. A CAM-based intrusion detection system for single-packet attack detection. [Citation Graph (, )][DBLP]


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