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Krishna Saraswat: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Shailesh Agarwal, Arthur M. Keller, Gio Wiederhold, Krishna Saraswat
    Flexible Relation: An Approach for Integrating Data from Multiple, Possibly Inconsistent Databases. [Citation Graph (4, 17)][DBLP]
    ICDE, 1995, pp:495-504 [Conf]
  2. Pawan Kapur, Gaurav Chandra, Krishna Saraswat
    Power estimation in global interconnects and its reduction using a novel repeater optimization methodology. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:461-466 [Conf]
  3. Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, Krishna Saraswat
    Multiple Si layer ICs: motivation, performance analysis, and design implications. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:213-220 [Conf]
  4. TingYen Chiang, Kaustav Banerjee, Krishna Saraswat
    Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:165-0 [Conf]
  5. Krishna Saraswat
    Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics. [Citation Graph (0, 0)][DBLP]
    ISQED, 2004, pp:327- [Conf]
  6. Bipin Rajendran, Pawan Kapur, Krishna Saraswat, R. Fabian, W. Pease
    Self-consistent power/performance/reliability analysis for copper interconnects. [Citation Graph (0, 0)][DBLP]
    SLIP, 2004, pp:17-22 [Conf]
  7. Krishna Saraswat, Shukri J. Souri, Kaustav Banerjee, Pawan Kapur
    Performance analysis and technology of 3-D ICs. [Citation Graph (0, 0)][DBLP]
    SLIP, 2000, pp:85-90 [Conf]
  8. Hoyeol Cho, Kyung-Hoae Koo, Pawan Kapur, Krishna Saraswat
    Modeling of the performance of carbon nanotube bundle, cu/low-k and optical on-chip global interconnects. [Citation Graph (0, 0)][DBLP]
    SLIP, 2007, pp:81-88 [Conf]

  9. Performance comparison between copper, carbon nanotube, and optical interconnects. [Citation Graph (, )][DBLP]


  10. Performance comparison of cu/low-k, carbon nanotube, and optics for on-chip and off-chip interconnects. [Citation Graph (, )][DBLP]


  11. Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs. [Citation Graph (, )][DBLP]


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