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Publications of Author

1. Tanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar
   Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:486-491 [Conf]
   
2. Liqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De
   Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   DAC, 1998, pp:489-494 [Conf]
   
3. Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De
   Mixed-V_th (MVT) CMOS Circuit Design Methodology for Low Power Applications. [Citation Graph (0, 0)][DBLP]
   DAC, 1999, pp:430-435 [Conf]
   
4. Naran Sirisantana, Liqiong Wei, Kaushik Roy
   High-Performance Low-Power CMOS Circuits Using Multiple Channel Length and Multiple Oxide Thickness. [Citation Graph (0, 0)][DBLP]
   ICCD, 2000, pp:227-0 [Conf]
   
5. Kaushik Roy, Liqiong Wei, Zhanping Chen
   Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 1999, pp:366-370 [Conf]
   
6. Zhanping Chen, Mark Johnson, Liqiong Wei, Kaushik Roy
   Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks. [Citation Graph (0, 0)][DBLP]
   ISLPED, 1998, pp:239-244 [Conf]
   
7. Zhanping Chen, Liqiong Wei, Kaushik Roy
   On Effective IDDQ Testing of Low Voltage CMOS Circuits Using Leakage Control Techniques. [Citation Graph (0, 0)][DBLP]
   ISQED, 2000, pp:181-188 [Conf]
   
8. Liqiong Wei, Kaushik Roy, Vivek De
   Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2000, pp:24-29 [Conf]
   
9. Zhanping Chen, Liqiong Wei, Ali Keshavarzi, Kaushik Roy
   IDDQ Testing for Deep-Submicron ICs: Challenges and Solutions. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2002, v:19, n:2, pp:24-33 [Journal]
   
10. Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De
    Design and optimization of dual-threshold circuits for low-voltage low-power applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:1, pp:16-24 [Journal]
    
11. Zhanping Chen, Liqiong Wei, Kaushik Roy
    On effective I_DDQ testing of low-voltage CMOS circuits using leakage control techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:5, pp:718-725 [Journal]
    
12. Liqiong Wei, Rongtian Zhang, Kaushik Roy, Zhanping Chen, David B. Janes
    Vertically integrated SOI circuits for low-power and high-performance applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:3, pp:351-362 [Journal]