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Publications of Author

1. Kevin J. Kerns, Andrew T. Yang
   Stable and Efficient Reduction of Large, Multiport RC Networks by Pole Analysis via Congruence Transformations. [Citation Graph (0, 0)][DBLP]
   DAC, 1996, pp:280-285 [Conf]
   
2. Kevin J. Kerns, Andrew T. Yang
   Preservation of Passivity During RLC Network Reduction via Split Congruence Transformations. [Citation Graph (0, 0)][DBLP]
   DAC, 1997, pp:34-39 [Conf]
   
3. Daniel G. Saab, Andrew T. Yang, Ibrahim N. Hajj
   Delay Modeling and Time of Bipolar Digital Circuits. [Citation Graph (0, 0)][DBLP]
   DAC, 1988, pp:288-293 [Conf]
   
4. Ivan L. Wemple, Andrew T. Yang
   Mixed-Signal Switching Noise Analysis Using Voronoi-Tessellated Substrate Macromodels. [Citation Graph (0, 0)][DBLP]
   DAC, 1995, pp:439-444 [Conf]
   
5. Andrew T. Yang, C. H. Chan, Jack T. Yao, R. R. Daniels, J. P. Harrang
   Modeling and Simulation of High-Frequency Integrated Circuits Based on Scattering Parameters. [Citation Graph (0, 0)][DBLP]
   DAC, 1991, pp:752-757 [Conf]
   
6. Andrew T. Yang, S. M. Kang
   iSMILE: A Novel Circuit Simulation Program with Emphasis on New Device Model Development. [Citation Graph (0, 0)][DBLP]
   DAC, 1989, pp:630-633 [Conf]
   
7. Andrew T. Yang, Yu Liu, Jack T. Yao, R. R. Daniels
   An Efficient Non-Quasi-Static Diode Model for Circuit Simulation. [Citation Graph (0, 0)][DBLP]
   DAC, 1993, pp:720-725 [Conf]
   
8. Yu-Hsu Chang, Andrew T. Yang
   Analytic macromodeling and simulation fo tightly-coupled mixed analog-digital circuits. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1992, pp:244-247 [Conf]
   
9. Julie Chen, Andrew T. Yang
   Style: a technology-independent approach to statistical design. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1993, pp:210-214 [Conf]
   
10. Steven D. Corey, Andrew T. Yang
    Automatic netlist extraction for measurement-based characterization of off-chip interconnect. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:24-29 [Conf]
    
11. Kevin J. Kerns, Ivan L. Wemple, Andrew T. Yang
    Stable and efficient reduction of substrate model networks using congruence transforms. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:207-214 [Conf]
    
12. Andrew T. Yang, Yu-Hsu Chang
    Bipolar Timing Modeling Including Interconnects Based on Parametric Correction. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:354-357 [Conf]
    
13. Julie Chen, Andrew T. Yang
    STYLE: a statistical design approach based on nonparametric performance macromodeling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:7, pp:794-802 [Journal]
    
14. Kevin J. Kerns, Andrew T. Yang
    Stable and efficient reduction of large, multiport RC networks by pole analysis via congruence transformations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:7, pp:734-744 [Journal]
    
15. Kevin J. Kerns, Andrew T. Yang
    Preservation of passivity during RLC network reduction via split congruence transformations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:7, pp:582-591 [Journal]
    
16. Ivan L. Wemple, Andrew T. Yang
    Integrated circuit substrate coupling models based on Voronoi tessellation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:12, pp:1459-1469 [Journal]
    
17. Andrew T. Yang, Yu-Hsu Chang, Daniel G. Saab, Ibrahim N. Hajj
    Switch-level timing simulation of bipolar ECL circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:4, pp:516-530 [Journal]
    
18. Andrew T. Yang, Yu Liu, Jack T. Yao
    An efficient nonquasi-static diode model for circuit simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:2, pp:231-239 [Journal]