The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Yoshihiro Kitamura: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yoshihiro Kitamura
    Sequential Circuit Fault Simulation by Fault Information Tracing Algorithm: FIT. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:151-154 [Conf]
  2. Toshio Kondo, Toshio Tsuchiya, Yoshihiro Kitamura, Yoshi Sugiyama, Takashi Kimura, Takayoshi Nakashima
    Pseudo MIMD Array Processor - AAP2. [Citation Graph (0, 0)][DBLP]
    ISCA, 1986, pp:330-337 [Conf]
  3. Yasunori Sameshima, Yoshihiro Kitamura, Tomoo Fukazawa
    Multiple signature analysis method using fault simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:11, pp:1434-1437 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002