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Robert H. Klenke: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sally A. McKee, Robert H. Klenke, Kenneth L. Wright, William A. Wulf, Maximo H. Salinas, James H. Aylor, Alan P. Baston
    Smarter Memory: Improving Bandwidth for Streamed References. [Citation Graph (1, 0)][DBLP]
    IEEE Computer, 1998, v:31, n:7, pp:54-63 [Journal]
  2. Robert H. Klenke, Moshe Meyassed, James H. Aylor, Barry W. Johnson, Ramesh Rao, Anup Ghosh
    An Integrated Design Environment for Performance and Dependability Analysis. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:184-189 [Conf]
  3. Robert M. McGraw, James H. Aylor, Robert H. Klenke
    A Top-Down Design Environment for Developing Pipelined Datapaths. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:236-241 [Conf]
  4. Sally A. McKee, Robert H. Klenke, Andrew J. Schwab, William A. Wulf, Steven A. Moyer, James H. Aylor, Charles Y. Hitchcock
    Experimental Implementation of Dynamic Access Ordering. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:431-440 [Conf]
  5. Sung I. Hong, Sally A. McKee, Maximo H. Salinas, Robert H. Klenke, James H. Aylor, William A. Wulf
    Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory. [Citation Graph (0, 0)][DBLP]
    HPCA, 1999, pp:80-89 [Conf]
  6. Robert M. McGraw, Moshe Meyassed, Robert H. Klenke, James H. Aylor, Ronald D. Williams
    Refinement of system-level designs using hybrid modeling. [Citation Graph (0, 0)][DBLP]
    ICECCS, 1995, pp:409-416 [Conf]
  7. Sally A. McKee, Assaji Aluwihare, Benjamin H. Clark, Robert H. Klenke, Trevor C. Landon, Christopher W. Oliver, Maximo H. Salinas, Adam E. Szymkowiak, Kenneth L. Wright, William A. Wulf, James H. Aylor
    Design and Evaluation of Dynamic Access Ordering Hardware. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1996, pp:125-132 [Conf]
  8. Robert H. Klenke, Lori M. Kaufman, James H. Aylor, Ronald Waxman, Padmini Narayan
    Workstation Based Parallel Test Generation. [Citation Graph (0, 0)][DBLP]
    ITC, 1993, pp:419-428 [Conf]
  9. Jason J. Hein, James H. Aylor, Robert H. Klenke
    Performance-Based System Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:35-36 [Conf]
  10. Robert H. Klenke
    A Hardware/Software Codesign Senior Capstone Design Project in Computer Engineering. [Citation Graph (0, 0)][DBLP]
    MSE, 2001, pp:58-0 [Conf]
  11. Robert H. Klenke
    Design of a 32-Bit Microprocessor in an Undergraduate VLSI Design Course. [Citation Graph (0, 0)][DBLP]
    MSE, 2001, pp:62-63 [Conf]
  12. Robert H. Klenke
    A UAV-Based Computer Engineering Capstone Senior Design Project. [Citation Graph (0, 0)][DBLP]
    MSE, 2005, pp:111-112 [Conf]
  13. Robert H. Klenke, James H. Aylor
    A Proposed Modeling Environment to Teach Performance Modeling and Hardware/Software Codesign to Senior Undergraduates. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:27-28 [Conf]
  14. Robert H. Klenke, Jerry H. Tucker, Jason M. Blevins
    A New Hardware/Software Codesign Environment and Senior Capstone Design Project for Computer Engineering. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:66-67 [Conf]
  15. Robert H. Klenke, James H. Aylor, Joseph M. Wolf
    An analysis of fault partitioning algorithms for fault partitioned ATPG. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:231-239 [Conf]
  16. Sam Mitchum, Robert H. Klenke
    Design and fabrication of a digitally synthesized, digitally controlled ring oscillator. [Citation Graph (0, 0)][DBLP]
    Circuits, Signals, and Systems, 2005, pp:26-30 [Conf]
  17. Robert H. Klenke, Ronald D. Williams, James H. Aylor
    Parallel-Processing Techniques for Automatic Test Pattern Generation. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1992, v:25, n:1, pp:71-84 [Journal]
  18. Gang Han, Robert H. Klenke, James H. Aylor
    Performance Modeling of Hierarchical Crossbar-Based Multicomputer Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:9, pp:877-890 [Journal]
  19. Sally A. McKee, William A. Wulf, James H. Aylor, Robert H. Klenke, Maximo H. Salinas, Sung I. Hong, Dee A. B. Weikle
    Dynamic Access Ordering for Streamed Computations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:11, pp:1255-1271 [Journal]
  20. Moshe Meyassed, Robert H. Klenke, James H. Aylor
    Resolving unknown inputs in mixed-level simulation with sequential elements. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:8, pp:1151-1164 [Journal]
  21. Joseph M. Wolf, Lori M. Kaufman, Robert H. Klenke, James H. Aylor, Ronald Waxman
    An analysis of fault partitioned parallel test generation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:5, pp:517-534 [Journal]

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