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Steven Parkes: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ken Kubiak, Steven Parkes, W. Kent Fuchs, Resve A. Saleh
    Exact Evaluation of Diagnostic Test Resolution. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:347-352 [Conf]
  2. Steven Parkes, Prithviraj Banerjee, Janak H. Patel
    ProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:717-721 [Conf]
  3. John G. Holm, Steven Parkes, Prithviraj Banerjee
    Performance Evaluation of a C++ Library Based Multithreaded System. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1997, pp:282-291 [Conf]
  4. Steven Parkes, Prithviraj Banerjee, Janak H. Patel
    A parallel algorithm for fault simulation based on PROOFS . [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:616-0 [Conf]
  5. John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee
    Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1997, pp:172-179 [Conf]
  6. Kaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee
    Parallel algorithms for logic synthesis using the MIS approach. [Citation Graph (0, 0)][DBLP]
    IPPS, 1995, pp:579-585 [Conf]
  7. SungHo Kim, Prithviraj Banerjee, Balkrishna Ramkumar, Steven Parkes, John A. Chandy
    ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement. [Citation Graph (0, 0)][DBLP]
    IPPS, 1994, pp:932-941 [Conf]
  8. John A. Chandy, Steven Parkes, Prithviraj Banerjee
    Distributed Object Oriented Data Structures and Algorithms for VLSI CAD. [Citation Graph (0, 0)][DBLP]
    IRREGULAR, 1996, pp:147-158 [Conf]
  9. Steven Parkes, John A. Chandy, Prithviraj Banerjee
    A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application. [Citation Graph (0, 0)][DBLP]
    SC, 1994, pp:69-78 [Conf]
  10. John A. Chandy, SungHo Kim, Balkrishna Ramkumar, Steven Parkes, Prithviraj Banerjee
    An evaluation of parallel simulated annealing strategies with application to standard cell placement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:4, pp:398-410 [Journal]
  11. Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, R. Anderson, J. R. Uribe
    Overview of a compiler for synthesizing MATLAB programs onto FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:3, pp:312-324 [Journal]

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