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Charles Selvidge: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Murali Kudlugi, Soha Hassoun, Charles Selvidge, Duaine Pryor
    A Transaction-Based Unified Simulation/Emulation Architecture for Functional Verification. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:623-628 [Conf]
  2. Murali Kudlugi, Charles Selvidge, Russell Tessier
    Static Scheduling of Multiple Asynchronous Domains For Functional Verification. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:647-652 [Conf]
  3. Charles Selvidge, Anant Agarwal, Matthew Dahl, Jonathan Babb
    TIERS: Topology Independent Pipelined Routing and Scheduling for VirtualWire Compilation. [Citation Graph (0, 0)][DBLP]
    FPGA, 1995, pp:25-31 [Conf]
  4. Amit Gupta, Charles Selvidge
    Acyclic modeling of combinational loops. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:343-347 [Conf]
  5. Murali Kudlugi, Charles Selvidge, Russell Tessier
    Static Scheduling of Multi-Domain Memories For Functional Verification. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:2-9 [Conf]
  6. Soha Hassoun, Murali Kudlugi, Duaine Pryor, Charles Selvidge
    A transaction-based unified architecture for simulation and emulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:2, pp:278-287 [Journal]

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