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Baldomir Zajc: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Roman Kuznar, Franc Brglez, Baldomir Zajc
    Multi-way Netlist Partitioning into Heterogeneous FPGAs and Minimization of Total Device Cost and Interconnect. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:238-243 [Conf]
  2. Andrej Zemva, Franc Brglez, Krzysztof Kozminski, Baldomir Zajc
    A Functionality Fault Model: Feasibility and Applications. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:152-158 [Conf]
  3. Andrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc
    An Experimental Programmable Environment for Prototyping Digital Circuits. [Citation Graph (0, 0)][DBLP]
    FPL, 1996, pp:337-345 [Conf]
  4. Andrej Trost, Andrej Zemva, Baldomir Zajc
    Educational Programmable Hardware Prototyping and Verification System. [Citation Graph (0, 0)][DBLP]
    FPL, 2000, pp:818-821 [Conf]
  5. Andrej Trost, Andrej Zemva, Baldomir Zajc
    Programmabel Prototyping System for Image Processing. [Citation Graph (0, 0)][DBLP]
    FPL, 1998, pp:490-494 [Conf]
  6. Hubert Fröhlich, Andrej Koir, Baldomir Zajc
    Optimization of FPGA configurations using parallel genetic algorithm. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 2001, v:133, n:3-4, pp:195-219 [Journal]
  7. Andrej Zemva, Baldomir Zajc
    Test generation for technology-specific multi-faults based on detectable perturbations. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:1, pp:163-173 [Journal]

  8. A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions. [Citation Graph (, )][DBLP]


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