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Publications of Author

1. Yung-Te Lai, Massoud Pedram, Sarma B. K. Vrudhula
   BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis. [Citation Graph (0, 0)][DBLP]
   DAC, 1993, pp:642-647 [Conf]
   
2. Yung-Te Lai, Sarma Sastry
   Edge-Valued Binary Decision Diagrams for Multi-Level Hierarchical Verification. [Citation Graph (0, 0)][DBLP]
   DAC, 1992, pp:608-613 [Conf]
   
3. Yung-Te Lai, Massoud Pedram, Sarma B. K. Vrudhula
   FGILP: an integer linear program solver based on function graphs. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1993, pp:685-689 [Conf]
   
4. Yung-Te Lai, Kuo-Rueih Ricky Pan, Massoud Pedram
   FPGA Synthesis Using Function Decomposition. [Citation Graph (0, 0)][DBLP]
   ICCD, 1994, pp:30-35 [Conf]
   
5. Yung-Te Lai, Sarma Sastry, Massoud Pedram
   Boolean Matching Using Binary Decision Diagrams with Applications to Logic Synthesis and Verification. [Citation Graph (0, 0)][DBLP]
   ICCD, 1992, pp:452-458 [Conf]
   
6. John L. Carroll, Leland L. Beck, Yung-Te Lai
   Performance Evaluation of the Largest-first/First-fit Dynamic Storage Allocation Technique. [Citation Graph (0, 0)][DBLP]
   Performance, 1983, pp:325-340 [Conf]
   
7. Yung-Te Lai, Massoud Pedram, Sarma B. K. Vrudhula
   Formal Verification Using Edge-Valued Binary Decision Diagrams. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1996, v:45, n:2, pp:247-255 [Journal]
   
8. Yung-Te Lai, Kuo-Rueih Ricky Pan, Massoud Pedram
   OBDD-based function decomposition: algorithms and implementation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:8, pp:977-990 [Journal]
   
9. Yung-Te Lai, Massoud Pedram, Sarma B. K. Vrudhula
   EVBDD-based algorithms for integer linear programming, spectral transformation, and function decomposition. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:8, pp:959-975 [Journal]