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Shidhartha Das: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David Blaauw, Trevor N. Mudge
    Circuit-aware architectural simulation. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:305-310 [Conf]
  2. Shidhartha Das, Kanak Agarwal, David Blaauw, Dennis Sylvester
    Optimal Inductance for On-chip RLC Interconnections. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:264-0 [Conf]
  3. Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Austin, David Blaauw, Trevor N. Mudge
    Reducing pipeline energy demands with local DVS and dynamic retiming. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:319-324 [Conf]
  4. Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge
    Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation. [Citation Graph (0, 0)][DBLP]
    MICRO, 2003, pp:7-18 [Conf]
  5. Dan Ernst, Shidhartha Das, Seokwoo Lee, David Blaauw, Todd M. Austin, Trevor N. Mudge, Nam Sung Kim, Krisztián Flautner
    Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:6, pp:10-20 [Journal]

  6. DVFS in loop accelerators using BLADES. [Citation Graph (, )][DBLP]


  7. Addressing design margins through error-tolerant circuits. [Citation Graph (, )][DBLP]


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