The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Yun Sik Lee: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yun Sik Lee, Peter M. Maurer
    Two New Techniques for Compiled Multi-Delay Logic Simulation. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:420-423 [Conf]
  2. Sam Chung, Yun Sik Lee
    Modeling Web Applications Using Java and XML Related Technologies. [Citation Graph (0, 0)][DBLP]
    HICSS, 2003, pp:322- [Conf]
  3. Yun Sik Lee, Peter M. Maurer
    Parallel multi-delay simulation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:759-762 [Conf]
  4. Sam Chung, Yun Sik Lee
    Reverse Software Engineering with UML for Web Site Maintenance. [Citation Graph (0, 0)][DBLP]
    WISE (2), 2000, pp:157-161 [Conf]
  5. Yun Sik Lee, Peter M. Maurer
    Bit-parallel multidelay simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:12, pp:1547-1554 [Journal]
  6. Peter M. Maurer, Yun Sik Lee
    Gateways: a technique for adding event-driven behavior to compiled simulations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:3, pp:338-352 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002