The SCEAS System
Navigation Menu

Search the dblp DataBase


Tan Yan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jing Li, Tan Yan, Bo Yang, Juebang Yu, Chunhui Li
    A packing algorithm for non-manhattan hexagon/triangle placement design by using an adaptive o-tree representation. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:646-651 [Conf]
  2. Tan Yan, Qing Dong, Yasuhiro Takashima, Yoji Kajitani
    How does partitioning matter for 3D floorplanning? [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:73-78 [Conf]
  3. Tan Yan, Hiroshi Murata
    Fast wire length estimation by net bundling for block placement. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:172-178 [Conf]
  4. Tan Yan, Haruna Murata
    A robust and correct computation for the curvilinear routing problem. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:5678-5681 [Conf]
  5. Tan Yan, Shigetoshi Nakatake, Takashi Nojima
    Formulating the Empirical Strategies in Module Generation of Analog MOS Layout. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:44-49 [Conf]

  6. A Theoretical Study on Wire Length Estimation Algorithms for Placement with Opaque Blocks. [Citation Graph (, )][DBLP]

  7. Automatic bus planner for dense PCBs. [Citation Graph (, )][DBLP]

  8. A correct network flow model for escape routing. [Citation Graph (, )][DBLP]

  9. An optimal algorithm for finding disjoint rectangles and its application to PCB routing. [Citation Graph (, )][DBLP]

  10. Optimal bus sequencing for escape routing in dense PCBs. [Citation Graph (, )][DBLP]

  11. Untangling twisted nets for bus routing. [Citation Graph (, )][DBLP]

  12. BSG-Route: a length-matching router for general topology. [Citation Graph (, )][DBLP]

  13. Optimal layer assignment for escape routing of buses. [Citation Graph (, )][DBLP]

  14. B-escape: a simultaneous escape routing algorithm based on boundary routing. [Citation Graph (, )][DBLP]

  15. A negotiated congestion based router for simultaneous escape routing. [Citation Graph (, )][DBLP]

Search in 0.002secs, Finished in 0.003secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002