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Ricardo Augusto da Luz Reis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis
    Designing fault tolerant systems into SRAM-based FPGAs. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:650-655 [Conf]
  2. Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis
    Comparative Analysis and Application of Data Repository Infrastructure for Collaboration-Enabled Distributed Design Environments. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:1130- [Conf]
  3. Leandro Soares Indrusiak, Florian Lubitz, Ricardo Augusto da Luz Reis, Manfred Glesner
    Ubiquitous Access to Reconfigurable Hardware: Application Scenarios and Implementation Issues. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10940-10945 [Conf]
  4. Alex Panato, Marcelo Barcelos, Ricardo Augusto da Luz Reis
    A Low Device Occupation IP to Implement Rijndael Algorithm. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:20020-20025 [Conf]
  5. Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis
    Reducing pin and area overhead in fault-tolerant FPGA-based designs. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:108-117 [Conf]
  6. Leandro Soares Indrusiak, Jürgen Becker, Manfred Glesner, Ricardo Augusto da Luz Reis
    Distributed Collaborative Design over Cave2 Framework. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2001, pp:97-108 [Conf]
  7. Fernanda Lima, Marcelo O. Johann, José Luís Almada Güntzel, Eduardo D'Avila, Luigi Carro, Ricardo Augusto da Luz Reis
    Designing a Mask Programmable Matrix for Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI, 1999, pp:439-446 [Conf]
  8. Lillian N. Cassel, Gordon Davies, Deepak Kumar, Ralf Denzer, A. E. N. Hacquebard, Richard J. LeBlanc, Luiz Ernesto Merkle, Fred Mulder, Zeljko Panian, Ricardo Augusto da Luz Reis, Eric Roberts, Paolo Rocchi, Maarten van Veen, Avelino F. Zorzo
    Computing: The Shape of an Evolving Discipline. [Citation Graph (0, 0)][DBLP]
    Informatics Curricula and Teaching Methods, 2002, pp:131-138 [Conf]
  9. Fernanda Gusmão de Lima, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis
    Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:194- [Conf]
  10. Alexandre Casacurta, Marcel Furtado Almeida, Ricardo Augusto da Luz Reis
    A Visual Simulation Tool at Layout Level. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:110-111 [Conf]
  11. Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, Giuliana Alcántara, Stefan Hoermann, Ralf Steinmetz
    Reducing Authoring Costs of Online Training in Microelectronics Design by Reusing Design Documentation Content. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:57-58 [Conf]
  12. Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak
    Microelectronics Education Using WWW. [Citation Graph (0, 0)][DBLP]
    MSE, 1999, pp:43-44 [Conf]
  13. Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak
    VRML and Microelectronics Education. [Citation Graph (0, 0)][DBLP]
    MSE, 1999, pp:84-85 [Conf]
  14. Ricardo Augusto da Luz Reis
    Power and Timing Driven Physical Design Automation. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:348-357 [Conf]
  15. Daniel Lima Ferrão, Gustavo Wilke, Ricardo Augusto da Luz Reis, José Luís Almada Güntzel
    Improving Critical Path Identification in Functional Timing Analysis. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:297-302 [Conf]
  16. Renato Fernandes Hentschke, Ricardo Augusto da Luz Reis
    Improving Simulated Annealing Placement by Applying Random and Greedy Mixed Perturbations. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:267-0 [Conf]
  17. Marcelo O. Johann, Andrew E. Caldwell, Ricardo Augusto da Luz Reis, Andrew B. Kahng
    Admissibility Proofs for the LCS* Algorithm. [Citation Graph (0, 0)][DBLP]
    IBERAMIA-SBIA, 2000, pp:236-244 [Conf]
  18. Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis
    Lookup-based Remote Laboratory for FPGA Digital Design Prototyping. [Citation Graph (0, 0)][DBLP]
    VIRTUAL-LAB, 2004, pp:3-11 [Conf]
  19. Cristiano Lazzari, Cristiano Viana Domingues, José Luís Almada Güntzel, Ricardo Augusto da Luz Reis
    A New Macro-cell Generation Strategy for three metal layer CMOS Technologies. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:193-197 [Conf]
  20. Renato Fernandes Hentschke, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis
    A study on the performance of fast initial placement algorithms. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:204-0 [Conf]
  21. José Luís Almada Güntzel, Ricardo Augusto da Luz Reis
    Análise de Timing Funcional de Circuitos VLSI Contendo Portas Complexas. [Citation Graph (0, 0)][DBLP]
    RITA, 2001, v:8, n:1, pp:111-142 [Journal]
  22. Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Ricardo Augusto da Luz Reis
    A multiple bit upset tolerant SRAM memory. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2003, v:8, n:4, pp:577-590 [Journal]
  23. Glauco Borges Valim dos Santos, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis
    Channel based routing in channel-less circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  24. Renato Fernandes Hentschke, Jaganathan Narasimham, Marcelo O. Johann, Ricardo Augusto da Luz Reis
    Maze routing steiner trees with effective critical sink optimization. [Citation Graph (0, 0)][DBLP]
    ISPD, 2007, pp:135-142 [Conf]
  25. Renato Fernandes Hentschke, Sandro Sawicki, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis
    An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:128-133 [Conf]
  26. César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis
    Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2005, pp:179-194 [Conf]
  27. Leonardo L. de Oliveira, Cristiano Santos, Daniel Lima Ferrão, Eduardo A. C. da Costa, José C. Monteiro, João Baptista Martins, Sergio Bampi, Ricardo Augusto da Luz Reis
    A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2005, pp:25-39 [Conf]
  28. Leandro Soares Indrusiak, Ricardo Augusto da Luz Reis
    3D integrated circuit layout visualization using VRML. [Citation Graph (0, 0)][DBLP]
    Future Generation Comp. Syst., 2001, v:17, n:5, pp:503-511 [Journal]

  29. Analysis of Power Consumption Using a New Methodology for the Capacitance Modeling of Complex Logic Gates. [Citation Graph (, )][DBLP]


  30. Resource-and-time-aware test strategy for configurable quaternary logic blocks. [Citation Graph (, )][DBLP]


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