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Subarna Sinha: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jianfeng Luo, Subarna Sinha, Qing Su, Jamil Kawa, Charles Chiang
    An IC manufacturing yield model considering intra-die variations. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:749-754 [Conf]
  2. Charles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky
    Bright-Field AAPSM Conflict Detection and Correction. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:908-913 [Conf]
  3. Charles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu
    Fast and efficient phase conflict detection and correction in standard-cell layouts. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:149-156 [Conf]
  4. H. Yao, S. Sinha, C. Chiang, X. Hong, Y. Cai
    Efficient process-hotspot detection using range pattern matching. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:625-632 [Conf]
  5. Subarna Sinha, Qing Su, Linni Wen, Frank Lee, Charles Chiang, Yi-Kan Cheng, Jin-Lien Lin, Yu-Chyi Harn
    A New Flexible Algorithm for Random Yield Improvement. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:795-800 [Conf]
  6. Charles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky
    Bright-Field AAPSM Conflict Detection and Correction [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]

  7. The road to 3D EDA tool readiness. [Citation Graph (, )][DBLP]


  8. Model Based Layout Pattern Dependent Metal Filling Algorithm for Improved Chip Surface Uniformity in the Copper Process. [Citation Graph (, )][DBLP]


  9. Sequential logic rectifications with approximate SPFDs. [Citation Graph (, )][DBLP]


  10. A methodology for fast and accurate yield factor estimation during global routing. [Citation Graph (, )][DBLP]


  11. Accurate detection for process-hotspots with vias and incomplete specification. [Citation Graph (, )][DBLP]


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