The SCEAS System
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## Search the dblp DataBase
Shen Lin:
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## Publications of Author- Shen Lin, Ernest S. Kuh
**Transient Simulation of Lossy Interconnect.**[Citation Graph (0, 0)][DBLP] DAC, 1992, pp:81-86 [Conf] - Shen Lin, Malgorzata Marek-Sadowska, Ernest S. Kuh
**Delay and Area Optimization in Standard-Cell Design.**[Citation Graph (0, 0)][DBLP] DAC, 1990, pp:349-352 [Conf] - Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Lei He
**Clocktree RLC Extraction with Efficient Inductance Modeling.**[Citation Graph (0, 0)][DBLP] DATE, 2000, pp:522-0 [Conf] - Shen Lin, Norman Chang
**Challenges in Power-Ground Integrity.**[Citation Graph (0, 0)][DBLP] ICCAD, 2001, pp:651-0 [Conf] - Shen Lin, C. K. Wong
**Process-variation-tolerant clock skew minimization.**[Citation Graph (0, 0)][DBLP] ICCAD, 1994, pp:284-288 [Conf] - Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. Kuh
**Techniques for fast circuit simulation applied to power estimation of CMOS circuits.**[Citation Graph (0, 0)][DBLP] ISLPD, 1995, pp:135-138 [Conf] - Yu Cao, Xuejue Huang, Chenming Hu, Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie
**Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion.**[Citation Graph (0, 0)][DBLP] ISQED, 2001, pp:185-190 [Conf] - Shen Lin, Norman Chang, O. Sam Nakagawa
**Quick On-Chip Self- and Mutual-Inductance Screen.**[Citation Graph (0, 0)][DBLP] ISQED, 2000, pp:513-0 [Conf] - Zhenyu Tang, Lei He, Norman Chang, Shen Lin, Weize Xie, Sam Nakagawa
**Instruction Prediction for Step Power Reduction.**[Citation Graph (0, 0)][DBLP] ISQED, 2001, pp:211-216 [Conf] - Zhiping Yu, Dan Yergeau, Robert W. Dutton, Sam Nakagawa, Norman Chang, Shen Lin, Weize Xie
**Full Chip Thermal Simulation.**[Citation Graph (0, 0)][DBLP] ISQED, 2000, pp:145-150 [Conf] - Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa, Lei He
**Ramp Up/Down Functional Unit to Reduce Step Power.**[Citation Graph (0, 0)][DBLP] PACS, 2000, pp:13-24 [Conf] - Shen Lin, Ernest S. Kuh
**Circuit simulation for large interconnected IC networks.**[Citation Graph (0, 0)][DBLP] VLSI, 1993, pp:333-342 [Conf] - Shen Lin, Tibor Rado
**Computer Studies of Turing Machine Problems.**[Citation Graph (0, 0)][DBLP] J. ACM, 1965, v:12, n:2, pp:196-212 [Journal] - Frank K. Hwang, Shen Lin
**A Direct Method to Construct Triple Systems.**[Citation Graph (0, 0)][DBLP] J. Comb. Theory, Ser. A, 1974, v:17, n:1, pp:84-94 [Journal] - Frank K. Hwang, Shen Lin
**A Simple Algorithm for Merging Two Disjoint Linearly-Ordered Sets.**[Citation Graph (0, 0)][DBLP] SIAM J. Comput., 1972, v:1, n:1, pp:31-39 [Journal] - Shen Lin, Ernest S. Kuh, Malgorzata Marek-Sadowska
**Stepwise equivalent conductance circuit simulation technique.**[Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:5, pp:672-683 [Journal] - Yu Cao, Xuejue Huang, N. H. Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Dennis Sylvester, Chenming Hu
**Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion.**[Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2002, v:10, n:6, pp:799-805 [Journal] **A methodology for analysis and verification of power gated circuits with correlated results.**[Citation Graph (, )][DBLP]**Early analysis for power distribution networks.**[Citation Graph (, )][DBLP]**An Alternative Choice of Scratch-Pad Memory for Energy Optimization in Embedded System.**[Citation Graph (, )][DBLP]
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