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Murari Mani: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Murari Mani, Anirudh Devgan, Michael Orshansky
    An efficient algorithm for statistical minimization of total power under timing yield constraints. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:309-314 [Conf]
  2. Ashish Kumar Singh, Murari Mani, Ruchir Puri, Michael Orshansky
    Gain-based technology mapping for minimum runtime leakage under input vector uncertainty. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:522-527 [Conf]
  3. Murari Mani, Mahesh Sharma, Michael Orshansky
    Application of fast SOCP based statistical sizing in the microprocessor design flow. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:372-375 [Conf]
  4. Ashish Kumar Singh, Murari Mani, Michael Orshansky
    Statistical technology mapping for parametric yield. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:511-518 [Conf]
  5. Murari Mani, Ashish Kumar Singh, Michael Orshansky
    Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:19-26 [Conf]
  6. Murari Mani, Michael Orshansky
    A New Statistical Optimization Algorithm for Gate Sizing. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:272-277 [Conf]

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