The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Andrew Seawright: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wolfgang Meyer, Andrew Seawright, Fumiya Tada
    Design and Synthesis of Array Structured Telecommunication Processing Applications. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:486-491 [Conf]
  2. Barry M. Pangrle, Forrest Brewer, Donald Lobo, Andrew Seawright
    Relevant Issues in High-Level Connectivity Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:607-610 [Conf]
  3. Andrew Seawright, Forrest Brewer
    Synthesis from Production-Based Specifications. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:194-199 [Conf]
  4. Andrew Seawright, Forrest Brewer
    High-Level Symbolic Construction Technique for High Performance Sequential Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:424-428 [Conf]
  5. Andrew Seawright, Wolfgang Meyer
    Partitioning and Optimizing Controllers Synthesized from Hierarchical High-Level Descriptions. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:770-775 [Conf]
  6. Luc Séméria, Renu Mehra, Barry M. Pangrle, Arjuna Ekanayake, Andrew Seawright, Daniel Ng
    RTL c-based methodology for designing and verifying a multi-threaded processor. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:123-128 [Conf]
  7. Raul Camposano, Andrew Seawright, Joseph Buck
    Modeling and synthesis of behavior, control and dataflow (tutorial). [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:- [Conf]
  8. Forrest Brewer, Barry M. Pangrle, Andrew Seawright
    Interconnection synthesis with geometric constraints. [Citation Graph (0, 0)][DBLP]
    MICRO, 1990, pp:158-165 [Conf]
  9. Jiang Long, Andrew Seawright
    Synthesizing SVA Local Variables for Formal Verification. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:75-80 [Conf]
  10. Andrew Seawright, Forrest Brewer
    Clairvoyant: a synthesis system for production-based specification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1994, v:2, n:2, pp:172-185 [Journal]

  11. Multi-clock SVA synthesis without re-writing. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002