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Salvador Mir:
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Publications of Author
- Salvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas
SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. [Citation Graph (0, 0)][DBLP] DAC, 1997, pp:281-286 [Conf]
- Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur
Pseudorandom functional BIST for linear and nonlinear MEMS. [Citation Graph (0, 0)][DBLP] DATE, 2006, pp:664-669 [Conf]
- Rabeb Kheriji, V. Danelon, Jean-Louis Carbonéro, Salvador Mir
Optimising Test Sets for a Low Noise Amplifier with a Defect-Oriented Approach. [Citation Graph (0, 0)][DBLP] DATE, 2005, pp:170-171 [Conf]
- Salvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas
Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. [Citation Graph (0, 0)][DBLP] DATE, 1998, pp:810-814 [Conf]
- Luís Rolíndez, Salvador Mir, Guillaume Prenat, Ahcène Bounceur
A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns. [Citation Graph (0, 0)][DBLP] DATE, 2004, pp:706-707 [Conf]
- Salvador Mir, Benoît Charlot, Gabriela Nicolescu, P. Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz
Towards design and validation of mixed-technology SOCs. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2000, pp:29-33 [Conf]
- Marcelo Lubaszewski, Salvador Mir, Leandro Pulz
ABILBO: Analog BuILt-in Block Observer. [Citation Graph (0, 0)][DBLP] ICCAD, 1996, pp:600-603 [Conf]
- Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, C. Nielsen, Bernard Courtois
Built-in self-test and fault diagnosis of fully differential analogue circuits. [Citation Graph (0, 0)][DBLP] ICCAD, 1994, pp:486-490 [Conf]
- Mohammad A. Naal, Emmanuel Simeu, Salvador Mir
On-Line Testable Decimation Filter Design for AMS Systems. [Citation Graph (0, 0)][DBLP] IOLTS, 2003, pp:83-88 [Conf]
- A. Castillejo, D. Veychard, Salvador Mir, Jean-Michel Karam, Bernard Courtois
Failure mechanisms and fault classes for CMOS-compatible microelectromechanical systems. [Citation Graph (0, 0)][DBLP] ITC, 1998, pp:541-550 [Conf]
- Benoît Charlot, Salvador Mir, Érika F. Cota, Marcelo Lubaszewski, Bernard Courtois
Fault modeling of suspended thermal MEMS. [Citation Graph (0, 0)][DBLP] ITC, 1999, pp:319-328 [Conf]
- Bernard Courtois, Jean-Michel Karam, Salvador Mir, Marcelo Lubaszewski, Vladimir Székely, Márta Rencz, Klaus Hofmann, Manfred Glesner
Design and Test of MEMs. [Citation Graph (0, 0)][DBLP] VLSI Design, 1999, pp:270-0 [Conf]
- Salvador Mir, Libor Rufer, Bernard Courtois
On-chip testing of embedded transducers. [Citation Graph (0, 0)][DBLP] VLSI Design, 2004, pp:463-0 [Conf]
- Benoît Charlot, Salvador Mir, Fabien Parrain, Bernard Courtois
Electrically Induced Stimuli For MEMS Self-Test. [Citation Graph (0, 0)][DBLP] VTS, 2001, pp:210-217 [Conf]
- Salvador Mir, H. Bederr, R. D. (Shawn) Blanton, Hans G. Kerkhoff, H. J. Klim
SoCs with MEMS? Can We Include MEMS in the SoCs Design and Test Flow? [Citation Graph (0, 0)][DBLP] VTS, 2002, pp:449-450 [Conf]
- Luís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro
A SNDR BIST for Sigma-Delta Analogue-to-Digital Converters. [Citation Graph (0, 0)][DBLP] VTS, 2006, pp:314-319 [Conf]
- Salvador Mir, Benoît Charlot
On the Integration of Design and Test for Chips Embedding MEMS. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 1999, v:16, n:4, pp:28-38 [Journal]
- Vladimir Kolarik, Salvador Mir, Marcelo Lubaszewski, Bernard Courtois
Analog checkers with absolute and relative tolerances. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:5, pp:607-612 [Journal]
- Salvador Mir, Libor Rufer, Achraf Dhayni
Built-in-self-test techniques for MEMS. [Citation Graph (0, 0)][DBLP] Microelectronics Journal, 2006, v:37, n:12, pp:1591-1597 [Journal]
- Bozena Kaminska, Stephen K. Sunter, Salvador Mir
Analog and mixed signal test techniques for SOC development. [Citation Graph (0, 0)][DBLP] Microelectronics Journal, 2005, v:36, n:12, pp:1063- [Journal]
- Guillaume Prenat, Salvador Mir, Diego Vázquez, Luís Rolíndez
A low-cost digital frequency testing approach for mixed-signal devices using SigmaDelta modulation. [Citation Graph (0, 0)][DBLP] Microelectronics Journal, 2005, v:36, n:12, pp:1080-1090 [Journal]
- J. Tongbong, Salvador Mir, Jean-Louis Carbonéro
Interactive presentation: Evaluation of test measures for LNA production testing using a multinormal statistical model. [Citation Graph (0, 0)][DBLP] DATE, 2007, pp:731-736 [Conf]
- Emmanuel Simeu, Salvador Mir, R. Kherreddine, H. N. Nguyen
Envelope Detection Based Transition Time Supervision for Online Testing of RF MEMS Switches. [Citation Graph (0, 0)][DBLP] IOLTS, 2007, pp:237-243 [Conf]
- Ahcène Bounceur, Salvador Mir, Luís Rolíndez, Emmanuel Simeu
CAT platform for analogue and mixed-signal test evaluation and optimization. [Citation Graph (0, 0)][DBLP] VLSI-SoC, 2006, pp:320-325 [Conf]
- Livier Lizzarraga, Salvador Mir, Gilles Sicard, Ahcène Bounceur
Study of a BIST Technique for CMOS Active Pixel Sensors. [Citation Graph (0, 0)][DBLP] VLSI-SoC, 2006, pp:326-331 [Conf]
- Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur
On-chip Pseudorandom Testing for Linear and Nonlinear MEMS. [Citation Graph (0, 0)][DBLP] VLSI-SoC, 2005, pp:245-266 [Conf]
- Marcelo Lubaszewski, Salvador Mir, Vladimir Kolarik, C. Nielsen, Bernard Courtois
Design of self-checking fully differential circuits and boards. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2000, v:8, n:2, pp:113-128 [Journal]
- C. Roman, Salvador Mir, Benoît Charlot
Building an analogue fault simulation tool and its application to MEMS. [Citation Graph (0, 0)][DBLP] Microelectronics Journal, 2003, v:34, n:10, pp:897-906 [Journal]
- Salvador Mir, Tim Cheng, Andrew Richardson
Guest Editorial. [Citation Graph (0, 0)][DBLP] J. Electronic Testing, 2006, v:22, n:4-6, pp:311- [Journal]
- Luís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro
A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting. [Citation Graph (0, 0)][DBLP] J. Electronic Testing, 2006, v:22, n:4-6, pp:325-335 [Journal]
- Libor Rufer, Salvador Mir, Emmanuel Simeu, C. Domingues
On-Chip Pseudorandom MEMS Testing. [Citation Graph (0, 0)][DBLP] J. Electronic Testing, 2005, v:21, n:3, pp:233-241 [Journal]
A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation. [Citation Graph (, )][DBLP]
Enrichment of limited training sets in machine-learning-based analog/RF test. [Citation Graph (, )][DBLP]
Fault diagnosis of analog circuits based on machine learning. [Citation Graph (, )][DBLP]
Low Frequency Test for RF MEMS Switches. [Citation Graph (, )][DBLP]
Re-engineering hardware specifications by exploiting design semantics. [Citation Graph (, )][DBLP]
Sensors for built-in alternate RF test. [Citation Graph (, )][DBLP]
Defect filter for alternate RF test. [Citation Graph (, )][DBLP]
Defect Filter for Alternate RF Test. [Citation Graph (, )][DBLP]
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