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Klaus D. Müller-Glaser: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Klaus D. Müller-Glaser, J. Bortolazzi
    An Approach to Intelligent Assistance for the Specification of ASIC Design Using Objects and Rules. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:472-477 [Conf]
  2. Bernhard Wunder, Gunther Lehmann, Klaus D. Müller-Glaser
    VAMP: A VHDL-Based Concept for Accurate Modeling and Post Layout Timing Simulation of Electronic Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:119-124 [Conf]
  3. Klaus D. Müller-Glaser
    Domain specific model driven design for automotive electronic control units. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:557- [Conf]
  4. S. Schmerler, Y. Tanurhan, Klaus D. Müller-Glaser
    Advanced Optimistic Approaches in Logic Simulation. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:362-0 [Conf]
  5. Clemens Reichmann, Markus Kühl, Philipp Graf, Klaus D. Müller-Glaser
    GeneralStore - A CASE-Tool Integration Platform Enabling Model Level Coupling of Heterogeneous Designs for Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP]
    ECBS, 2004, pp:225-232 [Conf]
  6. Eric Sax, Y. Tanurhan, Klaus D. Müller-Glaser
    Integrated Design Process Support with VHDL-A. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1995, pp:493-498 [Conf]
  7. S. Schmerler, Y. Tanurhan, Klaus D. Müller-Glaser
    A Backplane for Mixed-Mode Cosimulation. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1995, pp:499-504 [Conf]
  8. Clemens Reichmann, Markus Kühl, Klaus D. Müller-Glaser
    An Overall System Design Approach Doing Object-Oriented Modeling to Code-Generation for Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP]
    FASE, 2003, pp:52-66 [Conf]
  9. Lennart Lindh, Klaus D. Müller-Glaser, Hans Rauch, Frank Stanischewski
    A Real-Time Kernel - Rapid Prototyping with VHDL and FPLs. [Citation Graph (0, 0)][DBLP]
    FPL, 1992, pp:134-145 [Conf]
  10. Gunther Lehmann, Bernhard Wunder, Klaus D. Müller-Glaser
    Basic concepts for an HDL reverse engineering tool-set. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:134-141 [Conf]
  11. Klaus D. Müller-Glaser, K. Kirsch, K. Neusinger
    Estimating Essential Design Characteristics to Support Project Planning for ASIC Design Management. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:148-151 [Conf]
  12. Gerd Frick, Klaus D. Müller-Glaser
    A virtual project house infrastructure for distributed development processes. [Citation Graph (0, 0)][DBLP]
    E-Business and Virtual Enterprises, 2000, pp:193-202 [Conf]
  13. Gerd Frick, Eric Sax, Klaus D. Müller-Glaser
    Knowledge sharing across organizational boundaries with application to distributed engineering processes. [Citation Graph (0, 0)][DBLP]
    IRMA Conference, 2000, pp:1116-1118 [Conf]
  14. Bernd K. Koch, Klaus D. Müller-Glaser
    An Examination of Feedback Bridging Faults in Digital CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1527-1530 [Conf]
  15. R. Arnold, M. Chowanetz, Werner Wolz, Klaus D. Müller-Glaser
    Test/Agent: CAD-integrated Automatic Generation of Test Programs. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:854-859 [Conf]
  16. Klaus Helmreich, Peter Nagel, Werner Wolz, Klaus D. Müller-Glaser
    An Approach to Chip-Internal Current Monitoring and Measurement Using an Electron Beam Tester. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:256-262 [Conf]
  17. R. Scharf, C. Kuntzsch, Klaus Helmreich, Werner Wolz, Klaus D. Müller-Glaser
    DRC-based Selection of Optimal Probing Points for Chip-Internal Measurements. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:840-847 [Conf]
  18. J. Bortolazzi, Klaus D. Müller-Glaser
    Rechnergestützte Spezifikation in einer integrierten Entwrusumgebung für anwendungsspezifische Systeme. [Citation Graph (0, 0)][DBLP]
    Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1990, pp:75-90 [Conf]
  19. H. Gundlach, Klaus D. Müller-Glaser
    Zum automatischen Einfügen von Testpunkten in sequentielle Schaltungen. [Citation Graph (0, 0)][DBLP]
    Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1990, pp:169-181 [Conf]
  20. Martin Fischer, S. Sani, Wilhelm Stork, Klaus D. Müller-Glaser
    Recording and Transmission of digital wound images with the help of mibile devices. [Citation Graph (0, 0)][DBLP]
    MoCoMed, 2003, pp:59-63 [Conf]
  21. Christophe Kunze, Wilhelm Stork, Klaus D. Müller-Glaser
    Tele-monitoring as a medical application of Ubiquitous Computing. [Citation Graph (0, 0)][DBLP]
    MoCoMed, 2003, pp:115-120 [Conf]
  22. Gero von Wagner, M. Kirst, M. Rajewicz, F. Karl, Wilhelm Stork, Klaus D. Müller-Glaser
    PATRES - A Mobile Patient simulator for Resuscitation Training. [Citation Graph (0, 0)][DBLP]
    MoCoMed, 2003, pp:7-13 [Conf]
  23. Jens E. Becker, Carsten Bieser, Alexander Thomas, Klaus D. Müller-Glaser, Jürgen Becker
    Hardware/Software Co-Training by FPGA/ASIC Synthesis and programming of a RISC Microprocessor-Core. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:134-135 [Conf]
  24. Carsten Bieser, Klaus D. Müller-Glaser, Jürgen Becker
    Hardware/Software Co-Training Lab: From VHDL Bit-Level Coding up to CASE-Tool Based System Modeling. [Citation Graph (0, 0)][DBLP]
    MSE, 2005, pp:51-52 [Conf]
  25. Carsten Bieser, Klaus D. Müller-Glaser
    COMPASS - A Novel Concept of a Reconfigurable Platform for Automotive System Development and Test. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2005, pp:135-140 [Conf]
  26. Carsten Bieser, Klaus D. Müller-Glaser
    Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:193-199 [Conf]
  27. Philipp Graf, Klaus D. Müller-Glaser
    Dynamic Mapping of Runtime Information Models for Debugging Embedded Software. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:3-9 [Conf]
  28. A. Burst, M. Wolff, Markus Kühl, Klaus D. Müller-Glaser
    Using CDIF for Concept-Oriented Rapid Prototyping of Electronic Systems. [Citation Graph (0, 0)][DBLP]
    International Workshop on Rapid System Prototyping, 1998, pp:182-187 [Conf]
  29. A. Burst, M. Wolff, Markus Kühl, Klaus D. Müller-Glaser
    Scheduling Strategies and Estimations for Concept-Oriented Rapid Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:140-145 [Conf]
  30. Markus Kühl, Clemens Reichmann, I. Prötel, Klaus D. Müller-Glaser
    From Object-Oriented Modeling to Code Generation for Rapid Prototyping of Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2002, pp:108-114 [Conf]
  31. Markus Kühl, B. Spitzer, Klaus D. Müller-Glaser, U. Dambacher
    Universal Object-Oriented Modeling for Rapid Prototyping of Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2001, pp:149-154 [Conf]
  32. B. Spitzer, A. Burst, M. Wolff, Klaus D. Müller-Glaser
    Interface Technologies for Versatile Rapid-Prototyping Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:204-209 [Conf]
  33. B. Spitzer, Markus Kühl, Klaus D. Müller-Glaser
    A Methodology for Architecture-Oriented Rapid Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2001, pp:200-205 [Conf]
  34. Philipp Graf, Clemens Reichmann, Klaus D. Müller-Glaser
    Towards a Platform for Debugging Executed UML-Models in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    UML Satellite Activities, 2004, pp:238-241 [Conf]
  35. Claus Ritter, Eberhard Schüler, Johannes Quast, Klaus D. Müller-Glaser
    Acceleration of MPEG-4 video applications with the reconfigurable HW processor XPP. [Citation Graph (0, 0)][DBLP]
    VCIP, 2003, pp:1097-1108 [Conf]
  36. Klaus D. Müller-Glaser, J. Bortolazzi, Y. Tanurhan, J. Ernst
    CAE in Requirements Definition and Specification for Complex Microelectronic Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:305-310 [Conf]
  37. Klaus D. Müller-Glaser, Clemens Reichmann, Markus Kühl, Stefan Benz
    Quality Assurance and Certification of Software Modules in Safety Critical Automotive Electronic Control Units Using a CASE-Tool Integration Platform. [Citation Graph (0, 0)][DBLP]
    ASWSD, 2004, pp:15-30 [Conf]
  38. Peter C. Lockemann, Klaus D. Müller-Glaser
    Forschungszentrum Informatik an der Universität Karlsruhe (FZI). [Citation Graph (0, 0)][DBLP]
    Inform., Forsch. Entwickl., 1999, v:14, n:1, pp:49-53 [Journal]
  39. Klaus D. Müller-Glaser
    Höchstintegrierte Digitalschaltungen für Datenverarbeitungsanlagen - Probleme und Lösungsansätze. [Citation Graph (0, 0)][DBLP]
    Elektronische Rechenanlagen, 1982, v:24, n:5, pp:207-217 [Journal]
  40. Ulrich Großmann, Enrik Berkhan, Luciana C. Jatoba, Jörg Ottenbacher, Wilhelm Stork, Klaus D. Müller-Glaser
    Security for Mobile Low Power Nodes in a Personal Area Network by Means of Trusted Platform Modules. [Citation Graph (0, 0)][DBLP]
    ESAS, 2007, pp:172-186 [Conf]
  41. Carsten Bieser, Martin Bahlinger, Matthias Heinz, Christian Stops, Klaus D. Müller-Glaser
    A Novel Partial Bitstream Merging Methodology Accelerating Xilinx Virtex-II FPGA Based RP System Setup. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]
  42. Philipp Graf, Klaus D. Müller-Glaser, Clemens Reichmann
    Nonintrusive Black- and White-Box Testing of Embedded Systems Software against UML Models. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2007, pp:130-138 [Conf]

  43. A Range-Based Monte Carlo Patient Localization during Emergency Response to Crisis. [Citation Graph (, )][DBLP]


  44. A System Architecture for Reconfigurable Trusted Platforms. [Citation Graph (, )][DBLP]


  45. Priority-based packet communication on a bus-shaped structure for FPGA-systems. [Citation Graph (, )][DBLP]


  46. A backplane approach for cosimulation in high-level system specification environments. [Citation Graph (, )][DBLP]


  47. Efficient Resource Estimation During Mass Casualty Emergency Response Based on a Location Aware Disaster Aid Network. [Citation Graph (, )][DBLP]


  48. A Graphical Model-Level Debugger for Heterogenous Reconfigurable Architectures. [Citation Graph (, )][DBLP]


  49. MORPHEUS: Heterogeneous Reconfigurable Computing. [Citation Graph (, )][DBLP]


  50. ModelScope: inspecting executable models during run-time. [Citation Graph (, )][DBLP]


  51. A self adaptive interfacing concept for consumer device integration into automotive entities. [Citation Graph (, )][DBLP]


  52. Configuration Measurement for FPGA-based Trusted Platforms. [Citation Graph (, )][DBLP]


  53. A Prototype of Trusted Platform Functionality on Reconfigurable Hardware for Bitstream Updates. [Citation Graph (, )][DBLP]


  54. An Approach to Supply Simulations of the Functional Environment of ECUs for Hardware-in-the-Loop Test Systems Based on EE-architectures Conform to AUTOSAR. [Citation Graph (, )][DBLP]


  55. Testing of an FPGA Based C2X-Communication Prototype with a Model Based Traffic Generation. [Citation Graph (, )][DBLP]


  56. Physical Layer Extraction of FlexRay Configuration Parameters. [Citation Graph (, )][DBLP]


  57. Car-to-Car Communication Security on Reconfigurable Hardware. [Citation Graph (, )][DBLP]


  58. The impact of time-triggered communication in automotive embedded systems. [Citation Graph (, )][DBLP]


  59. Supporting System Level Design of Distributed Real Time Systems for Automotive Applications. [Citation Graph (, )][DBLP]


  60. ISO/DIS 26262 in the Context of Electric and Electronic Architecture Modeling. [Citation Graph (, )][DBLP]


  61. Gaining Insight into Executable Models during Runtime: Architecture and Mappings. [Citation Graph (, )][DBLP]


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