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Klaus D. Müller-Glaser :
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Klaus D. Müller-Glaser , J. Bortolazzi An Approach to Intelligent Assistance for the Specification of ASIC Design Using Objects and Rules. [Citation Graph (0, 0)][DBLP ] DAC, 1989, pp:472-477 [Conf ] Bernhard Wunder , Gunther Lehmann , Klaus D. Müller-Glaser VAMP: A VHDL-Based Concept for Accurate Modeling and Post Layout Timing Simulation of Electronic Systems. [Citation Graph (0, 0)][DBLP ] DAC, 1996, pp:119-124 [Conf ] Klaus D. Müller-Glaser Domain specific model driven design for automotive electronic control units. [Citation Graph (0, 0)][DBLP ] DATE, 2006, pp:557- [Conf ] S. Schmerler , Y. Tanurhan , Klaus D. Müller-Glaser Advanced Optimistic Approaches in Logic Simulation. [Citation Graph (0, 0)][DBLP ] DATE, 1998, pp:362-0 [Conf ] Clemens Reichmann , Markus Kühl , Philipp Graf , Klaus D. Müller-Glaser GeneralStore - A CASE-Tool Integration Platform Enabling Model Level Coupling of Heterogeneous Designs for Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP ] ECBS, 2004, pp:225-232 [Conf ] Eric Sax , Y. Tanurhan , Klaus D. Müller-Glaser Integrated Design Process Support with VHDL-A. [Citation Graph (0, 0)][DBLP ] EUROSIM, 1995, pp:493-498 [Conf ] S. Schmerler , Y. Tanurhan , Klaus D. Müller-Glaser A Backplane for Mixed-Mode Cosimulation. [Citation Graph (0, 0)][DBLP ] EUROSIM, 1995, pp:499-504 [Conf ] Clemens Reichmann , Markus Kühl , Klaus D. Müller-Glaser An Overall System Design Approach Doing Object-Oriented Modeling to Code-Generation for Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP ] FASE, 2003, pp:52-66 [Conf ] Lennart Lindh , Klaus D. Müller-Glaser , Hans Rauch , Frank Stanischewski A Real-Time Kernel - Rapid Prototyping with VHDL and FPLs. [Citation Graph (0, 0)][DBLP ] FPL, 1992, pp:134-145 [Conf ] Gunther Lehmann , Bernhard Wunder , Klaus D. Müller-Glaser Basic concepts for an HDL reverse engineering tool-set. [Citation Graph (0, 0)][DBLP ] ICCAD, 1996, pp:134-141 [Conf ] Klaus D. Müller-Glaser , K. Kirsch , K. Neusinger Estimating Essential Design Characteristics to Support Project Planning for ASIC Design Management. [Citation Graph (0, 0)][DBLP ] ICCAD, 1991, pp:148-151 [Conf ] Gerd Frick , Klaus D. Müller-Glaser A virtual project house infrastructure for distributed development processes. [Citation Graph (0, 0)][DBLP ] E-Business and Virtual Enterprises, 2000, pp:193-202 [Conf ] Gerd Frick , Eric Sax , Klaus D. Müller-Glaser Knowledge sharing across organizational boundaries with application to distributed engineering processes. [Citation Graph (0, 0)][DBLP ] IRMA Conference, 2000, pp:1116-1118 [Conf ] Bernd K. Koch , Klaus D. Müller-Glaser An Examination of Feedback Bridging Faults in Digital CMOS Circuits. [Citation Graph (0, 0)][DBLP ] ISCAS, 1993, pp:1527-1530 [Conf ] R. Arnold , M. Chowanetz , Werner Wolz , Klaus D. Müller-Glaser Test/Agent: CAD-integrated Automatic Generation of Test Programs. [Citation Graph (0, 0)][DBLP ] ITC, 1992, pp:854-859 [Conf ] Klaus Helmreich , Peter Nagel , Werner Wolz , Klaus D. Müller-Glaser An Approach to Chip-Internal Current Monitoring and Measurement Using an Electron Beam Tester. [Citation Graph (0, 0)][DBLP ] ITC, 1991, pp:256-262 [Conf ] R. Scharf , C. Kuntzsch , Klaus Helmreich , Werner Wolz , Klaus D. Müller-Glaser DRC-based Selection of Optimal Probing Points for Chip-Internal Measurements. [Citation Graph (0, 0)][DBLP ] ITC, 1992, pp:840-847 [Conf ] J. Bortolazzi , Klaus D. Müller-Glaser Rechnergestützte Spezifikation in einer integrierten Entwrusumgebung für anwendungsspezifische Systeme. [Citation Graph (0, 0)][DBLP ] Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1990, pp:75-90 [Conf ] H. Gundlach , Klaus D. Müller-Glaser Zum automatischen Einfügen von Testpunkten in sequentielle Schaltungen. [Citation Graph (0, 0)][DBLP ] Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1990, pp:169-181 [Conf ] Martin Fischer , S. Sani , Wilhelm Stork , Klaus D. Müller-Glaser Recording and Transmission of digital wound images with the help of mibile devices. [Citation Graph (0, 0)][DBLP ] MoCoMed, 2003, pp:59-63 [Conf ] Christophe Kunze , Wilhelm Stork , Klaus D. Müller-Glaser Tele-monitoring as a medical application of Ubiquitous Computing. [Citation Graph (0, 0)][DBLP ] MoCoMed, 2003, pp:115-120 [Conf ] Gero von Wagner , M. Kirst , M. Rajewicz , F. Karl , Wilhelm Stork , Klaus D. Müller-Glaser PATRES - A Mobile Patient simulator for Resuscitation Training. [Citation Graph (0, 0)][DBLP ] MoCoMed, 2003, pp:7-13 [Conf ] Jens E. Becker , Carsten Bieser , Alexander Thomas , Klaus D. Müller-Glaser , Jürgen Becker Hardware/Software Co-Training by FPGA/ASIC Synthesis and programming of a RISC Microprocessor-Core. [Citation Graph (0, 0)][DBLP ] MSE, 2003, pp:134-135 [Conf ] Carsten Bieser , Klaus D. Müller-Glaser , Jürgen Becker Hardware/Software Co-Training Lab: From VHDL Bit-Level Coding up to CASE-Tool Based System Modeling. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:51-52 [Conf ] Carsten Bieser , Klaus D. Müller-Glaser COMPASS - A Novel Concept of a Reconfigurable Platform for Automotive System Development and Test. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2005, pp:135-140 [Conf ] Carsten Bieser , Klaus D. Müller-Glaser Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2006, pp:193-199 [Conf ] Philipp Graf , Klaus D. Müller-Glaser Dynamic Mapping of Runtime Information Models for Debugging Embedded Software. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2006, pp:3-9 [Conf ] A. Burst , M. Wolff , Markus Kühl , Klaus D. Müller-Glaser Using CDIF for Concept-Oriented Rapid Prototyping of Electronic Systems. [Citation Graph (0, 0)][DBLP ] International Workshop on Rapid System Prototyping, 1998, pp:182-187 [Conf ] A. Burst , M. Wolff , Markus Kühl , Klaus D. Müller-Glaser Scheduling Strategies and Estimations for Concept-Oriented Rapid Prototyping. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 1999, pp:140-145 [Conf ] Markus Kühl , Clemens Reichmann , I. Prötel , Klaus D. Müller-Glaser From Object-Oriented Modeling to Code Generation for Rapid Prototyping of Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:108-114 [Conf ] Markus Kühl , B. Spitzer , Klaus D. Müller-Glaser , U. Dambacher Universal Object-Oriented Modeling for Rapid Prototyping of Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2001, pp:149-154 [Conf ] B. Spitzer , A. Burst , M. Wolff , Klaus D. Müller-Glaser Interface Technologies for Versatile Rapid-Prototyping Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 1999, pp:204-209 [Conf ] B. Spitzer , Markus Kühl , Klaus D. Müller-Glaser A Methodology for Architecture-Oriented Rapid Prototyping. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2001, pp:200-205 [Conf ] Philipp Graf , Clemens Reichmann , Klaus D. Müller-Glaser Towards a Platform for Debugging Executed UML-Models in Embedded Systems. [Citation Graph (0, 0)][DBLP ] UML Satellite Activities, 2004, pp:238-241 [Conf ] Claus Ritter , Eberhard Schüler , Johannes Quast , Klaus D. Müller-Glaser Acceleration of MPEG-4 video applications with the reconfigurable HW processor XPP. [Citation Graph (0, 0)][DBLP ] VCIP, 2003, pp:1097-1108 [Conf ] Klaus D. Müller-Glaser , J. Bortolazzi , Y. Tanurhan , J. Ernst CAE in Requirements Definition and Specification for Complex Microelectronic Systems. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1993, pp:305-310 [Conf ] Klaus D. Müller-Glaser , Clemens Reichmann , Markus Kühl , Stefan Benz Quality Assurance and Certification of Software Modules in Safety Critical Automotive Electronic Control Units Using a CASE-Tool Integration Platform. [Citation Graph (0, 0)][DBLP ] ASWSD, 2004, pp:15-30 [Conf ] Peter C. Lockemann , Klaus D. Müller-Glaser Forschungszentrum Informatik an der Universität Karlsruhe (FZI). [Citation Graph (0, 0)][DBLP ] Inform., Forsch. Entwickl., 1999, v:14, n:1, pp:49-53 [Journal ] Klaus D. Müller-Glaser Höchstintegrierte Digitalschaltungen für Datenverarbeitungsanlagen - Probleme und Lösungsansätze. [Citation Graph (0, 0)][DBLP ] Elektronische Rechenanlagen, 1982, v:24, n:5, pp:207-217 [Journal ] Ulrich Großmann , Enrik Berkhan , Luciana C. Jatoba , Jörg Ottenbacher , Wilhelm Stork , Klaus D. Müller-Glaser Security for Mobile Low Power Nodes in a Personal Area Network by Means of Trusted Platform Modules. [Citation Graph (0, 0)][DBLP ] ESAS, 2007, pp:172-186 [Conf ] Carsten Bieser , Martin Bahlinger , Matthias Heinz , Christian Stops , Klaus D. Müller-Glaser A Novel Partial Bitstream Merging Methodology Accelerating Xilinx Virtex-II FPGA Based RP System Setup. [Citation Graph (0, 0)][DBLP ] FPL, 2006, pp:1-4 [Conf ] Philipp Graf , Klaus D. Müller-Glaser , Clemens Reichmann Nonintrusive Black- and White-Box Testing of Embedded Systems Software against UML Models. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2007, pp:130-138 [Conf ] A Range-Based Monte Carlo Patient Localization during Emergency Response to Crisis. [Citation Graph (, )][DBLP ] A System Architecture for Reconfigurable Trusted Platforms. [Citation Graph (, )][DBLP ] Priority-based packet communication on a bus-shaped structure for FPGA-systems. [Citation Graph (, )][DBLP ] A backplane approach for cosimulation in high-level system specification environments. [Citation Graph (, )][DBLP ] Efficient Resource Estimation During Mass Casualty Emergency Response Based on a Location Aware Disaster Aid Network. [Citation Graph (, )][DBLP ] A Graphical Model-Level Debugger for Heterogenous Reconfigurable Architectures. [Citation Graph (, )][DBLP ] MORPHEUS: Heterogeneous Reconfigurable Computing. [Citation Graph (, )][DBLP ] ModelScope: inspecting executable models during run-time. [Citation Graph (, )][DBLP ] A self adaptive interfacing concept for consumer device integration into automotive entities. [Citation Graph (, )][DBLP ] Configuration Measurement for FPGA-based Trusted Platforms. [Citation Graph (, )][DBLP ] A Prototype of Trusted Platform Functionality on Reconfigurable Hardware for Bitstream Updates. [Citation Graph (, )][DBLP ] An Approach to Supply Simulations of the Functional Environment of ECUs for Hardware-in-the-Loop Test Systems Based on EE-architectures Conform to AUTOSAR. [Citation Graph (, )][DBLP ] Testing of an FPGA Based C2X-Communication Prototype with a Model Based Traffic Generation. [Citation Graph (, )][DBLP ] Physical Layer Extraction of FlexRay Configuration Parameters. [Citation Graph (, )][DBLP ] Car-to-Car Communication Security on Reconfigurable Hardware. [Citation Graph (, )][DBLP ] The impact of time-triggered communication in automotive embedded systems. [Citation Graph (, )][DBLP ] Supporting System Level Design of Distributed Real Time Systems for Automotive Applications. [Citation Graph (, )][DBLP ] ISO/DIS 26262 in the Context of Electric and Electronic Architecture Modeling. [Citation Graph (, )][DBLP ] Gaining Insight into Executable Models during Runtime: Architecture and Mappings. [Citation Graph (, )][DBLP ] Search in 0.004secs, Finished in 0.008secs