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Arthur Nieuwoudt: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Arthur Nieuwoudt, Yehia Massoud
    Multi-level approach for integrated spiral inductor optimization. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:648-651 [Conf]
  2. Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud
    SOC-NLNA: synthesis and optimization for fully integrated narrow-band CMOS low noise amplifiers. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:879-884 [Conf]
  3. Tamer Ragheb, Arthur Nieuwoudt, Yehia Massoud
    Efficient modeling of integrated narrow-band low noise amplifiers for design space exploration. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:187-191 [Conf]
  4. Arthur Nieuwoudt, Yehia Massoud
    Robust automated synthesis methodology for integrated spiral inductors with variability. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:502-507 [Conf]
  5. Arthur Nieuwoudt, Tamer Ragheb, Hamid Nejati, Yehia Massoud
    Increasing Manufacturing Yield for Wideband RF CMOS LNAs in the Presence of Process Variations. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:801-806 [Conf]
  6. Arthur Nieuwoudt, Yehia Massoud
    Assessing the Implications of Process Variations on Future Carbon Nanotube Bundle Interconnect Solutions. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:119-126 [Conf]
  7. Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud
    Wavelet-Based Passivity Preserving Model Order Reduction for Wideband Interconnect Characterization. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:432-437 [Conf]
  8. Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud
    Systematic Design Optimization Methodology for Multi-Band CMOS Low Noise Amplifiers. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2007, pp:139-144 [Conf]
  9. Soumya Eachempati, Narayanan Vijaykrishnan, Arthur Nieuwoudt, Yehia Massoud
    Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2007, pp:516-517 [Conf]
  10. Yehia Massoud, Arthur Nieuwoudt
    Modeling and design challenges and solutions for carbon nanotube-based interconnect in future high performance integrated circuits. [Citation Graph (0, 0)][DBLP]
    JETC, 2006, v:2, n:3, pp:155-196 [Journal]
  11. Soumya Eachempati, Arthur Nieuwoudt, Aman Gayasen, Narayanan Vijaykrishnan, Yehia Massoud
    Assessing carbon nanotube bundle interconnect for future FPGA architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:307-312 [Conf]
  12. Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud
    Wavelet-Based Interpolation Point Selection for Multi-Shifted Arnoldi. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:653-656 [Conf]
  13. Yehia Massoud, Arthur Nieuwoudt, Tamer Ragheb
    Variability-Aware Synthesis for Wideband Low Noise Amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3219-3222 [Conf]
  14. Hamid Nejati, Tamer Ragheb, Arthur Nieuwoudt, Yehia Massoud
    Modeling and Design of Ultrawideband Low Noise Amplifiers with Generalized Impedance Matching Networks. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2622-2625 [Conf]

  15. Predicting the Performance and Reliability of Carbon Nanotube Bundles for On-Chip Interconnect. [Citation Graph (, )][DBLP]


  16. Hierarchical Optimization Methodology for Wideband Low Noise Amplifiers. [Citation Graph (, )][DBLP]


  17. Frequency Selective Model Order Reduction via Spectral Zero Projection. [Citation Graph (, )][DBLP]


  18. Reduced-Order Wide-Band Interconnect Model Realization using Filter-Based Spline Interpolation. [Citation Graph (, )][DBLP]


  19. Automated design of tunable impedance matching networks for reconfigurable wireless applications. [Citation Graph (, )][DBLP]


  20. Impact of dummy filling techniques on interconnect capacitance and planarization in nano-scale process technology. [Citation Graph (, )][DBLP]


  21. Robust reconfigurable filter design using analytic variability quantification techniques. [Citation Graph (, )][DBLP]


  22. Performance analysis of optimized carbon nanotube interconnect. [Citation Graph (, )][DBLP]


  23. Investigating the Design, Performance, and Reliability of Multi-Walled Carbon Nanotube Interconnect. [Citation Graph (, )][DBLP]


  24. Investigating the Impact of Fill Metal on Crosstalk-Induced Delay and Noise. [Citation Graph (, )][DBLP]


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