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Publications of Author

1. Jeffrey E. Nelson, Jason G. Brown, Rao Desineni, R. D. (Shawn) Blanton
   Multiple-detect ATPG based on physical neighborhoods. [Citation Graph (0, 0)][DBLP]
   DAC, 2006, pp:1099-1102 [Conf]
   
2. Jeffrey E. Nelson, Thomas Zanon, Rao Desineni, Jason G. Brown, N. Patil, Wojciech Maly, R. D. (Shawn) Blanton
   Extraction of defect density and size distributions from wafer sort test results. [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:913-918 [Conf]
   
3. Ronald D. Blanton, John T. Chen, Rao Desineni, Kumar N. Dwarakanath, Wojciech Maly, Thomas J. Vogels
   Fault Tuples in Diagnosis of Deep-Submicron Circuits. [Citation Graph (0, 0)][DBLP]
   ITC, 2002, pp:233-241 [Conf]
   
4. Rao Desineni, Kumar N. Dwarakanath, Ronald D. Blanton
   Universal test generation using fault tuples. [Citation Graph (0, 0)][DBLP]
   ITC, 2000, pp:812-819 [Conf]
   
5. Thomas J. Vogels, Thomas Zanon, Rao Desineni, R. D. (Shawn) Blanton, Wojciech Maly, Jason G. Brown, Jeffrey E. Nelson, Y. Fei, X. Huang, Padmini Gopalakrishnan, Mahim Mishra, V. Rovner, S. Tiwary
   Benchmarking Diagnosis Algorithms With a Diverse Set of IC Deformations. [Citation Graph (0, 0)][DBLP]
   ITC, 2004, pp:508-517 [Conf]
   
6. Rao Desineni, R. D. (Shawn) Blanton
   Diagnosis of Arbitrary Defects Using Neighborhood Function Extraction. [Citation Graph (0, 0)][DBLP]
   VTS, 2005, pp:366-373 [Conf]
   
7. Ronald D. Blanton, Kumar N. Dwarakanath, Rao Desineni
   Defect Modeling Using Fault Tuples. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:11, pp:2450-2464 [Journal]