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Alexander Zaslavsky: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky
    Designing logic circuits for probabilistic computation in the presence of noise. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:485-490 [Conf]
  2. Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky
    Designing MRF based error correcting circuits for memory elements. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:792-793 [Conf]
  3. Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky
    Optimizing noise-immune nanoscale circuits using principles of Markov random fields. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:149-152 [Conf]
  4. Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky
    MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2006, v:26, n:5, pp:19-27 [Journal]
  5. Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky
    Interactive presentation: Techniques for designing noise-tolerant multi-level combinational circuits. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:576-581 [Conf]
  6. Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky
    Designing Nanoscale Logic Circuits Based on Markov Random Fields. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2007, v:23, n:2-3, pp:255-266 [Journal]

  7. Numerical queue solution of thermal noise-induced soft errors in subthreshold CMOS devices. [Citation Graph (, )][DBLP]


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