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Publications of Author

1. David M. Wu, Charles E. Radke
   Delay Test Effectiveness Evaluation of LSSD-Based VLSI Vogic Circuits. [Citation Graph (0, 0)][DBLP]
   DAC, 1991, pp:291-295 [Conf]
   
2. Zhuoyu Bao, Suriya A. Kumar, David M. Wu, Vimal K. Natarajan, Mike Lin
   A Low Cost, High Quality Embedded Array DFT Technique for High Performance Processors. [Citation Graph (0, 0)][DBLP]
   DELTA, 2006, pp:57-63 [Conf]
   
3. David M. Wu
   Trouble With Scan. [Citation Graph (0, 0)][DBLP]
   ITC, 2002, pp:1199-1200 [Conf]
   
4. David M. Wu
   DFT is all I can afford, who cares about Design for Yield or Design for Reliability! [Citation Graph (0, 0)][DBLP]
   ITC, 1999, pp:1141-1142 [Conf]
   
5. David M. Wu
   "DFY and DFR are more important than DFT". [Citation Graph (0, 0)][DBLP]
   ITC, 1999, pp:1147- [Conf]
   
6. David M. Wu, Mike Lin, Subhasish Mitra, Kee Sup Kim, Anil Sabbavarapu, Talal Jaber, Pete Johnson, Dale March, Greg Parrish
   H-DFT: A Hybrid DFT Architecture For Low-Cost High Quality Structural Testing. [Citation Graph (0, 0)][DBLP]
   ITC, 2003, pp:1229-1238 [Conf]
   
7. David M. Wu, Mike Lin, Madhukar Reddy, Talal Jaber, Anil Sabbavarapu, Larry Thatcher
   An Optimized DFT and Test Pattern Generation Strategy for an Intel High Performance Microprocessor. [Citation Graph (0, 0)][DBLP]
   ITC, 2004, pp:38-47 [Conf]
   
8. David M. Wu, Charles E. Radke, C. C. Beh
   Improve Yield and Quality Through Testability Analysis of VLSI Circuits. [Citation Graph (0, 0)][DBLP]
   ITC, 1984, pp:713-717 [Conf]
   
9. David M. Wu, Charles E. Radke, J. P. Roth
   Statistical AC Test Coverage. [Citation Graph (0, 0)][DBLP]
   ITC, 1986, pp:538-541 [Conf]
   
10. Chao-Wen Tseng, Edward J. McCluskey, Xiaoping Shao, David M. Wu
    Cold Delay Defect Screening. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:183-188 [Conf]