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Brian K. Flachs:
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Publications of Author
- Stephen D. Posluszny, N. Aoki, D. Boerstler, P. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, N. Kojima, Ohsang Kwon, K. Lee, D. Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia
"Timing closure by design, " a high frequency microprocessor design methodology. [Citation Graph (0, 0)][DBLP] DAC, 2000, pp:712-717 [Conf]
- Jonathan Robinson, Samuel H. Russ, Brian K. Flachs, Bjørn Heckel
A Task Migration Implementation of the Message-Passing Interface. [Citation Graph (0, 0)][DBLP] HPDC, 1996, pp:61-68 [Conf]
- Osamu Takahashi, Russ Cook, Scott R. Cottier, Sang H. Dhong, Brian K. Flachs, Koji Hirairi, Atsushi Kawasumi, Hiroaki Murakami, Hiromi Noro, Hwa-Joon Oh, S. Onish, Juergen Pille, Joel Silberman
The circuit design of the synergistic processor element of a CELL processor. [Citation Graph (0, 0)][DBLP] ICCAD, 2005, pp:111-117 [Conf]
- Samuel H. Russ, Brian K. Flachs, Jonathan Robinson, Bjørn Heckel
Hector: Automated Task Allocation for MPI. [Citation Graph (0, 0)][DBLP] IPPS, 1996, pp:344-348 [Conf]
- Michael Gschwind, H. Peter Hofstee, Brian K. Flachs, Martin Hopkins, Yukio Watanabe, Takeshi Yamazaki
Synergistic Processing in Cell's Multicore Architecture. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2006, v:26, n:2, pp:10-24 [Journal]
- Osamu Takahashi, Scott R. Cottier, Sang H. Dhong, Brian K. Flachs, Joel Silberman
Power-Conscious Design of the Cell Processor's Synergistic Processor Element. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2005, v:25, n:5, pp:10-18 [Journal]
- Samuel H. Russ, Jonathan Robinson, Brian K. Flachs, Bjørn Heckel
The Hector Distributed Run-Time Environment. [Citation Graph (0, 0)][DBLP] IEEE Trans. Parallel Distrib. Syst., 1998, v:9, n:11, pp:1102-1114 [Journal]
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