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Naoyuki Kawabe: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak
    Function-level power estimation methodology for microprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:810-813 [Conf]
  2. Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa
    Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:646-647 [Conf]
  3. Kimiyoshi Usami, Naoyuki Kawabe, Masayuki Koizumi, Katsuhiro Seta, Toshiyuki Furusawa
    Automated selective multi-threshold design for ultra-low standby applications. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:202-206 [Conf]
  4. Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak
    Code Coverage-Based Power Estimation Techniques for Microprocessors. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2002, v:11, n:5, pp:557-0 [Journal]
  5. Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa
    Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]

  6. An automated runtime power-gating scheme. [Citation Graph (, )][DBLP]


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