|
Search the dblp DataBase
Bernhard Rohfleisch:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Bernhard Rohfleisch, Alfred Kölbl, Bernd Wurth
Reducing Power Dissipation after Technology Mapping by Structural Transformations. [Citation Graph (0, 0)][DBLP] DAC, 1996, pp:789-794 [Conf]
- Bernhard Rohfleisch, Bernd Wurth, Kurt Antreich
Logic Clause Analysis for Delay Optimization. [Citation Graph (0, 0)][DBLP] DAC, 1995, pp:668-672 [Conf]
- Bernhard Rohfleisch, Franc Brglez
Introduction of Permissible Bridges with Application to Logic Optimization after Technology Mapping. [Citation Graph (0, 0)][DBLP] EDAC-ETC-EUROASIC, 1994, pp:87-93 [Conf]
- Soren Hein, Vijay Nagasamy, Bernhard Rohfleisch, Christoforos E. Kozyrakis, Nikil D. Dutt, Francky Catthoor
Embedded memories in system design - from technology to systems architecture. [Citation Graph (0, 0)][DBLP] ICCAD, 1998, pp:1- [Conf]
- Guenter Stenz, Bernhard M. Riess, Bernhard Rohfleisch, Frank M. Johannes
Timing driven placement in interaction with netlist transformations. [Citation Graph (0, 0)][DBLP] ISPD, 1997, pp:36-41 [Conf]
- Guenter Stenz, Bernhard M. Riess, Bernhard Rohfleisch, Frank M. Johannes
Performance optimization by interacting netlist transformations andplacement. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:3, pp:350-358 [Journal]
Search in 0.001secs, Finished in 0.001secs
|