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Richard Yuan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sean Safarpour, Andreas G. Veneris, Gregg Baeckler, Richard Yuan
    Efficient SAT-based Boolean matching for FPGA technology mapping. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:466-471 [Conf]
  2. Michael Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo
    A methodology for FPGA to structured-ASIC synthesis and verification. [Citation Graph (0, 0)][DBLP]
    DATE Designers' Forum, 2006, pp:64-69 [Conf]
  3. David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose
    The Stratix II logic and routing architecture. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:14-20 [Conf]
  4. Michael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini
    Improving FPGA Performance and Area Using an Adaptive Logic Module. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:135-144 [Conf]

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