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Naotaka Maeda: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Koichi Sato, Masamichi Kawarabayashi, Hideyuki Emura, Naotaka Maeda
    Post-Layout Optimization for Deep Submicron Design. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:740-745 [Conf]
  2. Takumi Okamoto, Tsutomu Kimoto, Naotaka Maeda
    Design methodology and tools for NEC electronics' structured ASIC ISSP. [Citation Graph (0, 0)][DBLP]
    ISPD, 2004, pp:90-96 [Conf]

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