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Luc Rijnders: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
    A Programming Environment for the Design of Complex High Speed ASICs. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:315-320 [Conf]
  2. I. Vandeweerd, Kris Croes, Luc Rijnders, Paul Six, Hugo De Man
    REDUSA: Module Generation by Automatic Elimination of Superfluous Blocks in Regular Structures. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:694-697 [Conf]
  3. Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens
    A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:271-0 [Conf]
  4. Yajun Ha, Patrick Schaumont, Marc Engels, Serge Vernalde, Freddy Potargent, Luc Rijnders, Hugo De Man
    A Hardware Virtual Machine for the Networked Reconfiguration. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2000, pp:194-199 [Conf]
  5. Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor
    Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. [Citation Graph (0, 0)][DBLP]
    SCOPES, 2003, pp:313-328 [Conf]
  6. I. Vandeweerd, Kris Croes, Luc Rijnders, Paul Six, Hugo De Man
    REDUSA: module generation by automatic elimination of superfluous blocks in regular structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:9, pp:989-998 [Journal]
  7. Konstantinos Masselos, Kari Tiensyrjä, Yang Qu, Nikos S. Voros, Miroslav Cupák, Luc Rijnders, Marko Pettissalo
    System Level Architecture Exploration for Reconfigurable Systems On Chip. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]

  8. Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. [Citation Graph (, )][DBLP]

  9. Timing optimization by bit-level arithmetic transformations. [Citation Graph (, )][DBLP]

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