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Saumil Shah: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Saumil Shah, Puneet Gupta, Andrew B. Kahng
    Standard cell library optimization for leakage reduction. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:983-986 [Conf]
  2. Ashish Srivastava, Saumil Shah, Kanak Agarwal, Dennis Sylvester, David Blaauw, Stephen W. Director
    Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:535-540 [Conf]
  3. Kaviraj Chopra, Saumil Shah, Ashish Srivastava, David Blaauw, Dennis Sylvester
    Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:1023-1028 [Conf]
  4. Saumil Shah, Ashish Srivastava, Dushyant Sharma, Dennis Sylvester, David Blaauw, Vladimir Zolotov
    Discrete Vt assignment and gate sizing using a self-snapping continuous formulation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:705-712 [Conf]
  5. Saumil Shah, Kanak Agarwal, Dennis Sylvester
    A New Threshold Voltage Assignment Scheme for Runtime Leakage Reduction in On-Chip Repeaters. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:138-143 [Conf]
  6. Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester
    Line-End Shortening is Not Always a Failure. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:270-271 [Conf]

  7. Investigation of diffusion rounding for post-lithography analysis. [Citation Graph (, )][DBLP]

  8. Efficient smart sampling based full-chip leakage analysis for intra-die variation considering state dependence. [Citation Graph (, )][DBLP]

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