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Timothy N. Trick: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Shun-Lin Su, Vasant B. Rao, Timothy N. Trick
HPEX: A Hierarchical Parasitic Circuit Extractor. [Citation Graph (0, 0)][DBLP]
DAC, 1987, pp:566-569 [Conf] - Richard Burch, Farid N. Najm, Ping Yang, Timothy N. Trick
McPOWER: a Monte Carlo approach to power estimation. [Citation Graph (0, 0)][DBLP]
ICCAD, 1992, pp:90-97 [Conf] - Timothy N. Trick, Noel R. Strader, Virginia C. Poe, John M. Pankratz
Curriculum-Related Strategies to Attract and Retain Undergraduates in Disciplines of Interest to the Semiconductor Industry. [Citation Graph (0, 0)][DBLP]
MSE, 1999, pp:14-15 [Conf] - Francis B. Grosz, Timothy N. Trick
Some Modifications to Newton's Method for the Determination of the Steady-State Response of Nonlinear Oscillatory Circuits. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1982, v:1, n:3, pp:116-120 [Journal] - Dale E. Hocevar, Michael R. Lightner, Timothy N. Trick
A Study of Variance Reduction Techniques for Estimating Circuit Yields. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1983, v:2, n:3, pp:180-192 [Journal] - Dale E. Hocevar, Michael R. Lightner, Timothy N. Trick
An Extrapolated Yield Approximation Technique for Use in Yield Maximization. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1984, v:3, n:4, pp:279-287 [Journal] - Dale E. Hocevar, Ping Yang, Timothy N. Trick, Berton D. Epler
Transient Sensitivity Computation for MOSFET Circuits. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:4, pp:609-620 [Journal] - Vasant B. Rao, Timothy N. Trick
Network Partitioning and Ordering for MOS VLSI Circuits. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:1, pp:128-144 [Journal] - Tat-Kwan Yu, Sung-Mo Kang, I. N. Haji, Timothy N. Trick
Statistical Performance Modeling and Parametric Yield Estimation of MOS VLSI. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:6, pp:1013-1022 [Journal] - Richard Burch, Farid N. Najm, Ping Yang, Timothy N. Trick
A Monte Carlo approach for power estimation. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 1993, v:1, n:1, pp:63-71 [Journal]
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