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Taeweon Suh: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Taeweon Suh, Daehyun Kim, Hsien-Hsin S. Lee
    Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:553-558 [Conf]
  2. Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee
    Supporting Cache Coherence in Heterogeneous Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1150-1157 [Conf]
  3. Shih-Lien L. Lu, Peter Yiannacouras, Rolf Kassa, Michael Konow, Taeweon Suh
    An FPGA-based Pentium in a complete desktop system. [Citation Graph (0, 0)][DBLP]
    FPGA, 2007, pp:53-59 [Conf]
  4. Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough
    Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:4, pp:33-41 [Journal]
  5. Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough
    Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:5, pp:70-78 [Journal]

  6. An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems. [Citation Graph (, )][DBLP]


  7. Balanced Scheduling Algorithm Considering Availability in Mobile Grid. [Citation Graph (, )][DBLP]


  8. An Effective Job Replication Technique Based on Reliability and Performance in Mobile Grids. [Citation Graph (, )][DBLP]


  9. A Potential Based Routing Protocol for Mobile Ad Hoc Networks. [Citation Graph (, )][DBLP]


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