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Mehdi Baradaran Tahoori: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Mehdi Baradaran Tahoori
    Using satisfiability in application-dependent testing of FPGA interconnects. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:678-681 [Conf]
  2. Hossein Asadi, Vilas Sridharan, Mehdi Baradaran Tahoori, David R. Kaeli
    Vulnerability analysis of L2 cache elements to single event upsets. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:1276-1281 [Conf]
  3. Ghazanfar Asadi, Mehdi Baradaran Tahoori
    An Accurate SER Estimation Method Based on Propagation Probability. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:306-307 [Conf]
  4. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Fault Tolerance of Programmable Switch Blocks. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1358-1359 [Conf]
  5. Rajeev Murgai, Subodh M. Reddy, Takashi Miyoshi, Takeshi Horie, Mehdi Baradaran Tahoori
    Sensitivity-Based Modeling and Methodology for Full-Chip Substrate Noise Analysis. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:610-615 [Conf]
  6. Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Testing of Quantum Dot Cellular Automata Based Designs. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1408-1409 [Conf]
  7. Hossein Asadi, Mehdi Baradaran Tahoori
    Soft Error Modeling and Protection for Sequential Elements. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:463-474 [Conf]
  8. Jing Huang, Mariam Momenzadeh, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Defect Characterization for Scaling of QCA Devices. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:30-38 [Conf]
  9. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:96-104 [Conf]
  10. Jeetendra Kumar, Mehdi Baradaran Tahoori
    A Low Power Soft Error Suppression Technique for Dynamic Logic. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:454-462 [Conf]
  11. Mehdi Baradaran Tahoori
    Application-Dependent Testing of FPGA Interconnects. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:409-416 [Conf]
  12. Mehdi Baradaran Tahoori
    Defects, Yield, and Design in Sublithographic Nano-electronics. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:3-11 [Conf]
  13. Bhushan Vaidya, Mehdi Baradaran Tahoori
    Delay Test Generation with All Reachable Output Propagation and Multiple Excitations. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:380-388 [Conf]
  14. Mehdi Baradaran Tahoori, Subhasish Mitra
    Defect and Fault Tolerance of Reconfigurable Molecular Computing. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:176-185 [Conf]
  15. Ghazanfar Asadi, Mehdi Baradaran Tahoori
    Soft error rate estimation and mitigation for SRAM-based FPGAs. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:149-160 [Conf]
  16. Mehdi Baradaran Tahoori
    A high resolution diagnosis technique for open and short defects in FPGA interconnects. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:248- [Conf]
  17. Mehdi Baradaran Tahoori
    Application-dependent testing of FPGAs for bridging faults. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:248- [Conf]
  18. Jing Huang, Mariam Momenzadeh, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Design and characterization of an and-or-inverter (AOI) gate for QCA implementation. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:426-429 [Conf]
  19. Mehdi Baradaran Tahoori
    A mapping algorithm for defect-tolerance of reconfigurable nano-architectures. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:668-672 [Conf]
  20. Mehdi Baradaran Tahoori
    Application-independent defect-tolerant crossbar nano-architectures. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:730-734 [Conf]
  21. Hossein Asadi, Mehdi Baradaran Tahoori
    Soft error derating computation in sequential circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:497-501 [Conf]
  22. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Probabilistic Analysis of Fault Tolerance of FPGA Switch Block Array. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  23. Mariam Momenzadeh, Mehdi Baradaran Tahoori, Jing Huang, Fabrizio Lombardi
    Quantum Cellular Automata: New Defects and Faults for New Devices. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  24. Ghazanfar Asadi, Mehdi Baradaran Tahoori
    An analytical approach for soft error rate estimation in digital circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2991-2994 [Conf]
  25. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Routability and Fault Tolerance of FPGA Interconnect Architectures. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:479-488 [Conf]
  26. Mehdi Baradaran Tahoori
    Application-Dependent Diagnosis of FPGAs. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:645-654 [Conf]
  27. Mehdi Baradaran Tahoori, Subhasish Mitra
    Interconnect Delay Testing of Designs on Programmable Logic Devices. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:635-644 [Conf]
  28. Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey
    Fault Grading FPGA Interconnect Test Configurations. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:608-617 [Conf]
  29. Ghazanfar Asadi, Mehdi Baradaran Tahoori
    Soft Error Mitigation for SRAM-Based FPGAs. [Citation Graph (0, 0)][DBLP]
    VTS, 2005, pp:207-212 [Conf]
  30. Mehdi Baradaran Tahoori, Subhasish Mitra
    Automatic Configuration Generation for FPGA Interconnect Testing. [Citation Graph (0, 0)][DBLP]
    VTS, 2003, pp:134-144 [Conf]
  31. Mehdi Baradaran Tahoori, Mariam Momenzadeh, Jing Huang, Fabrizio Lombardi
    Defects and Faults in Quantum Cellular Automata at Nano Scale. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:291-296 [Conf]
  32. Mehdi Baradaran Tahoori, Edward J. McCluskey, Michel Renovell, Philippe Faure
    A Multi-Configuration Strategy for an Application Dependent Testing of FPGAs. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:154-170 [Conf]
  33. Brian Mullins, Hossein Asadi, Mehdi Baradaran Tahoori, David R. Kaeli, Kevin Granlund, Rudy Bauer, Scott Romano
    Case Study: Soft Error Rate Analysis in Storage Systems. [Citation Graph (0, 0)][DBLP]
    VTS, 2007, pp:256-264 [Conf]
  34. R. Iris Bahar, Mehdi Baradaran Tahoori, Sandeep K. Shukla, Fabrizio Lombardi
    Guest Editors' Introduction: Challenges for Reliable Design at the Nanoscale. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:4, pp:295-297 [Journal]
  35. Mehdi Baradaran Tahoori
    Application-independent defect tolerance of reconfigurable nanoarchitectures. [Citation Graph (0, 0)][DBLP]
    JETC, 2006, v:2, n:3, pp:197-218 [Journal]
  36. Mariam Momenzadeh, Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:12, pp:1881-1893 [Journal]
  37. Mehdi Baradaran Tahoori, Subhasish Mitra
    Techniques and algorithms for fault grading of FPGA interconnect test configurations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:2, pp:261-272 [Journal]
  38. Mehdi Baradaran Tahoori, Subhasish Mitra
    Application-independent testing of FPGA interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:11, pp:1774-1783 [Journal]
  39. Vilas Sridharan, Hossein Asadi, Mehdi Baradaran Tahoori, David R. Kaeli
    Reducing Data Cache Susceptibility to Soft Errors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Dependable Sec. Comput., 2006, v:3, n:4, pp:353-364 [Journal]
  40. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Fault Tolerance of Switch Blocks and Switch Block Arrays in FPGA. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:7, pp:794-807 [Journal]
  41. Mehdi Baradaran Tahoori
    Application-Dependent Testing of FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:9, pp:1024-1033 [Journal]
  42. Hossein Asadi, Mehdi Baradaran Tahoori
    Soft error hardening for logic-level designs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  43. Ghazanfar Asadi, Mehdi Baradaran Tahoori
    An Accurate SER Estimation Method Based on Propagation Probability [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]

  44. Panel: Reliability of data centers: Hardware vs. software. [Citation Graph (, )][DBLP]


  45. Transient Error Detection and Recovery in Processor Pipelines. [Citation Graph (, )][DBLP]


  46. Estimating Error Propagation Probabilities with Bounded Variances. [Citation Graph (, )][DBLP]


  47. Obtaining Microprocessor Vulnerability Factor Using Formal Methods. [Citation Graph (, )][DBLP]


  48. Soft error rate computation in early design stages using boolean satisfiability. [Citation Graph (, )][DBLP]


  49. BISM: built-in self map for hybrid crossbar nano-architectures. [Citation Graph (, )][DBLP]


  50. Balancing Performance and Reliability in the Memory Hierarchy. [Citation Graph (, )][DBLP]


  51. A transient error tolerant self-timed asynchronous architecture. [Citation Graph (, )][DBLP]


  52. Multiple fault diagnosis in crossbar nano-architectures. [Citation Graph (, )][DBLP]


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