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Ruey-Sing Wei: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Chia-Jeng Tseng, Ruey-Sing Wei, Steven G. Rothweiler, Michael M. Tong, Ajoy K. Bose
Bridge: A Versatile Behavioral Synthesis System. [Citation Graph (0, 0)][DBLP]
DAC, 1988, pp:415-420 [Conf] - Ruey-Sing Wei, Steven G. Rothweiler, Jing-Yang Jou
BECOME: Behavior Level Circuit Synthesis Based on Structure Mapping. [Citation Graph (0, 0)][DBLP]
DAC, 1988, pp:409-414 [Conf] - Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
PLATYPUS: a PLA test pattern generation tool. [Citation Graph (0, 0)][DBLP]
DAC, 1985, pp:197-203 [Conf] - Alberto L. Sangiovanni-Vincentelli, Ruey-Sing Wei
PROTEUS : A Logic Verification System for Combinational Circuits. [Citation Graph (0, 0)][DBLP]
ITC, 1986, pp:350-359 [Conf] - Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
New Front-End and Line Justification Algorithm for Automatic Test Generation. [Citation Graph (0, 0)][DBLP]
ITC, 1986, pp:121-128 [Conf] - Hi-Keung Tony Ma, Srinivas Devadas, Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
Logic verification algorithms and their parallel implementation. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:2, pp:181-189 [Journal] - Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
PLATYPUS: A PLA Test Pattern Generation Tool. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:4, pp:633-644 [Journal]
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