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Publications of Author

1. Hirendu Vaishnav, Massoud Pedram
   Routability-Driven Fanout Optimization. [Citation Graph (0, 0)][DBLP]
   DAC, 1993, pp:230-235 [Conf]
   
2. Hirendu Vaishnav, Massoud Pedram
   Minimizing the Routing Cost During Logic Extraction. [Citation Graph (0, 0)][DBLP]
   DAC, 1995, pp:70-75 [Conf]
   
3. Hirendu Vaishnav, Massoud Pedram
   Delay optimal partitioning targeting low power VLSI circuits. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1995, pp:638-643 [Conf]
   
4. Hirendu Vaishnav, Chi-Keung Lee, Massoud Pedram
   Post Layout Speed-up by Event Elimination. [Citation Graph (0, 0)][DBLP]
   ICCD, 1997, pp:211-216 [Conf]
   
5. Hirendu Vaishnav, Massoud Pedram
   Logic extraction based on normalized netlengths. [Citation Graph (0, 0)][DBLP]
   ICCD, 1995, pp:658-663 [Conf]
   
6. Hirendu Vaishnav, Massoud Pedram
   Alphabetic trees-theory and applications in layout-driven logicsynthesis. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:1, pp:58-69 [Journal]
   
7. Hirendu Vaishnav, Massoud Pedram
   Delay-optimal clustering targeting low-power VLSI circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:6, pp:799-812 [Journal]