|
Search the dblp DataBase
Srikanth Venkataraman:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel
Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists. [Citation Graph (0, 0)][DBLP] DAC, 1995, pp:133-138 [Conf]
- Dong Xiang, Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel
Partial Scan Design Based on Circuit State Information. [Citation Graph (0, 0)][DBLP] DAC, 1996, pp:807-812 [Conf]
- Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, Bharath Seshadri
Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis. [Citation Graph (0, 0)][DBLP] DATE, 2004, pp:68-75 [Conf]
- Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman
Extraction Error Modeling and Automated Model Debugging in High-Performance Low Power Custom Designs. [Citation Graph (0, 0)][DBLP] DATE, 2005, pp:996-1001 [Conf]
- Srikanth Venkataraman, W. Kent Fuchs
A deductive technique for diagnosis of bridging faults. [Citation Graph (0, 0)][DBLP] ICCAD, 1997, pp:562-567 [Conf]
- Srikanth Venkataraman
DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield. [Citation Graph (0, 0)][DBLP] ISQED, 2007, pp:5- [Conf]
- Srikanth Venkataraman, Nagesh Nagapalli, Lech Jozwiak
Quality Driven Manufacturing and SOC Designs. [Citation Graph (0, 0)][DBLP] ISQED, 2007, pp:5- [Conf]
- Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy
Fault Diagnosis and Fault Model Aliasing. [Citation Graph (0, 0)][DBLP] ISVLSI, 2005, pp:206-211 [Conf]
- M. Enamul Amyeen, Srikanth Venkataraman, Ajay Ojha, Sangbong Lee
Evaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor. [Citation Graph (0, 0)][DBLP] ITC, 2004, pp:669-678 [Conf]
- Ruifeng Guo, Srikanth Venkataraman
A technique for fault diagnosis of defects in scan chains. [Citation Graph (0, 0)][DBLP] ITC, 2001, pp:268-277 [Conf]
- Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy
Z-DFD: Design-for-Diagnosability Based on the Concept of Z-Detection. [Citation Graph (0, 0)][DBLP] ITC, 2004, pp:489-497 [Conf]
- Srikanth Venkataraman
Diagnosis meets Physical Failure Analysis: What is needed to succeed?. [Citation Graph (0, 0)][DBLP] ITC, 2004, pp:1442- [Conf]
- Srikanth Venkataraman, Scott Brady Drummonds
POIROT: a logic fault diagnosis tool and its applications. [Citation Graph (0, 0)][DBLP] ITC, 2000, pp:253-262 [Conf]
- Srikanth Venkataraman, W. Kent Fuchs
Diagnosis of Bridging Faults in Sequential Circuits Using Adaptive Simulation, State Storage, and Path-Tracing. [Citation Graph (0, 0)][DBLP] ITC, 1997, pp:878-886 [Conf]
- David Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman
DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. [Citation Graph (0, 0)][DBLP] VLSI Design, 2006, pp:14- [Conf]
- Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, Enamul Amyeen
Defect Diagnosis Based on Pattern-Dependent Stuck-At Faults. [Citation Graph (0, 0)][DBLP] VLSI Design, 2004, pp:475-480 [Conf]
- Srikanth Venkataraman, W. Kent Fuchs
Distributed Diagnostic Simulation of Stuck-At Faults in Sequential Circuits. [Citation Graph (0, 0)][DBLP] VLSI Design, 1997, pp:381-387 [Conf]
- Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel
Diagnostic Simulation of Sequential Circuits Using Fault Sampling. [Citation Graph (0, 0)][DBLP] VLSI Design, 1998, pp:476-481 [Conf]
- Ruifeng Guo, Subhasish Mitra, Enamul Amyeen, Jinkyu Lee, Srihari Sivaraj, Srikanth Venkataraman
Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive. [Citation Graph (0, 0)][DBLP] VTS, 2006, pp:66-71 [Conf]
- Debashis Nayak, Srikanth Venkataraman, Paul J. Thadikaran
Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application. [Citation Graph (0, 0)][DBLP] VTS, 2004, pp:97-102 [Conf]
- Bharath Seshadri, Irith Pomeranz, Srikanth Venkataraman, M. Enamul Amyeen, Sudhakar M. Reddy
Dominance Based Analysis for Large Volume Production Fail Diagnosis. [Citation Graph (0, 0)][DBLP] VTS, 2006, pp:392-399 [Conf]
- Bharath Seshadri, Xiaoming Yu, Srikanth Venkataraman
Accelerating Diagnostic Fault Simulation Using Z-diagnosis and Concurrent Equivalence Identification. [Citation Graph (0, 0)][DBLP] VTS, 2006, pp:380-385 [Conf]
- Ramesh C. Tekumalla, Srikanth Venkataraman, Jayabrata Ghosh-Dastidar
On Diagnosing Path Delay Faults in an At-Speed Environment. [Citation Graph (0, 0)][DBLP] VTS, 2001, pp:28-33 [Conf]
- Andreas G. Veneris, Ibrahim N. Hajj, Srikanth Venkataraman, W. Kent Fuchs
Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits. [Citation Graph (0, 0)][DBLP] VTS, 1999, pp:58-63 [Conf]
- Srikanth Venkataraman, Scott Brady Drummonds
A Technique for Logic Fault Diagnosis of Interconnect Open Defects. [Citation Graph (0, 0)][DBLP] VTS, 2000, pp:313-318 [Conf]
- Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs
Dynamic diagnosis of sequential circuits based on stuck-at faults. [Citation Graph (0, 0)][DBLP] VTS, 1996, pp:198-203 [Conf]
- Srikanth Venkataraman, Srihari Sivaraj, Enamul Amyeen, Sangbong Lee, Ajay Ojha, Ruifeng Guo
An Experimental Study of N-Detect Scan ATPG Patterns on a Processor. [Citation Graph (0, 0)][DBLP] VTS, 2004, pp:23-30 [Conf]
- Xiaoming Yu, Enamul Amyeen, Srikanth Venkataraman, Ruifeng Guo, Irith Pomeranz
Concurrent Execution of Diagnostic Fault Simulation and Equivalence Identification During Diagnostic Test Generation. [Citation Graph (0, 0)][DBLP] VTS, 2003, pp:351-358 [Conf]
- Vishnu C. Vimjam, M. Enamul Amyeen, Ruifeng Guo, Srikanth Venkataraman, Michael S. Hsiao, Kai Yang
Using Scan-Dump Values to Improve Functional-Diagnosis Methodology. [Citation Graph (0, 0)][DBLP] VTS, 2007, pp:231-238 [Conf]
- Srikanth Venkataraman, Scott Brady Drummonds
Poirot: Applications of a Logic Fault Diagnosis Tool. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 2001, v:18, n:1, pp:19-30 [Journal]
- Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois
Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1995, v:44, n:2, pp:223-233 [Journal]
- Ruifeng Guo, Srikanth Venkataraman
An algorithmic technique for diagnosis of faulty scan chains. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:9, pp:1861-1868 [Journal]
- Ismed Hartanto, Srikanth Venkataraman, W. Kent Fuchs, Elizabeth M. Rudnick, Janak H. Patel, Sreejit Chakravarty
Diagnostic simulation of stuck-at faults in sequential circuits using compact lists. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:4, pp:471-489 [Journal]
- Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman
Extraction error modeling and automated model debugging in high-performance custom designs. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2006, v:14, n:7, pp:763-776 [Journal]
- Srikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian
Making Manufacturing Work For You. [Citation Graph (0, 0)][DBLP] DAC, 2007, pp:107-108 [Conf]
DFM / DFT / SiliconDebug / Diagnosis. [Citation Graph (, )][DBLP]
Diagnosis of Scan Clock Failures. [Citation Graph (, )][DBLP]
Search in 0.003secs, Finished in 0.005secs
|