The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Xieting Ling: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Weiwei Mao, Xieting Ling
    Robust test generation algorithm for stuck-open fault in CMOS circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:236-242 [Conf]
  2. Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling
    Behavioral Modeling of Analog Circuits by Wavelet Collocation Method. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:65-69 [Conf]
  3. Zhenghong Wang, Xieting Ling, Bo Hu
    A low-complexity low-distortion topology for wideband delta-sigma ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:937-940 [Conf]
  4. Zhenghong Wang, Xieting Ling
    Noise-reducing loop in multi-bit Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:284-287 [Conf]
  5. Xin Li, Bo Hu, Xieting Ling, Xuan Zeng
    A wavelet balance approach for steady-state analysis of nonlinear circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2001, pp:73-76 [Conf]
  6. Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling
    Wavelet method for high-speed clock tree simulation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:177-180 [Conf]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002