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Publications of Author

1. Youngju Won, Sartaj Sahni, Yacoub M. El-Ziq
   A Hardware Accelerator for Maze Routing. [Citation Graph (0, 0)][DBLP]
   DAC, 1987, pp:800-806 [Conf]
   
2. Yacoub M. El-Ziq, Hamid H. Butt
   A Mixed-Mode Built-In Self-Test Technique Using Scan Path and Signature Analysis. [Citation Graph (0, 0)][DBLP]
   ITC, 1983, pp:269-274 [Conf]
   
3. Yacoub M. El-Ziq, Hamid H. Butt
   Impact of Mixed-Mode Self Test on Life Cycle Cost of VLSI Based Design. [Citation Graph (0, 0)][DBLP]
   ITC, 1984, pp:338-349 [Conf]
   
4. Yacoub M. El-Ziq, Richard J. Cloutier
   Functional-Level Test Generation for Stuck-Open Faults in CMOS VLSI. [Citation Graph (0, 0)][DBLP]
   ITC, 1981, pp:536-546 [Conf]
   
5. Wei-Cheng Her, Lin-Ming Jin, Yacoub M. El-Ziq
   An ATPG Driver Selection Algorithm for Interconnect Test with Boundary Scan. [Citation Graph (0, 0)][DBLP]
   ITC, 1992, pp:382-388 [Conf]
   
6. Yacoub M. El-Ziq, Stephen Y. H. Su
   Computer-Aided Logic Design of Two-Level MOS Combinational Networks with Statistical Results. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1978, v:27, n:10, pp:911-923 [Journal]
   
7. Yacoub M. El-Ziq, Stephen Y. H. Su
   Fault Diagnosis of MOS Combinational Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1982, v:31, n:2, pp:129-139 [Journal]
   
8. Youngju Won, Sartaj Sahni, Yacoub M. El-Ziq
   A Hardware Accelerator for Maze Routing. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1990, v:39, n:1, pp:141-145 [Journal]