The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Terri S. Fiez: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chenggang Xu, Ranjit Gharpurey, Terri S. Fiez, Kartikeya Mayaram
    A green function-based parasitic extraction method for inhomogeneous substrate layers. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:141-146 [Conf]
  2. Ravindranath Naiknaware, Terri S. Fiez
    CMOS analog circuit stack generation with matching constraints. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:371-375 [Conf]
  3. Anil Samavedam, Kartikeya Mayaram, Terri S. Fiez
    A scalable substrate noise coupling model for mixed-signal ICs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1999, pp:128-131 [Conf]
  4. Farbod Aram, Aria Eshraghi, Terri S. Fiez
    Compact and Accurate MOST Model for Analog Circuit Hand Calculations. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:213-216 [Conf]
  5. Rex T. Baird, Terri S. Fiez
    Stability Analysis of High-order Modulators for Delta-Sigma ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1361-1364 [Conf]
  6. Rex T. Baird, Terri S. Fiez
    Improved Delta-Sigma DAC Linearity Using Data Weighted Averaging. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:13-16 [Conf]
  7. Madhu Chennam, Terri S. Fiez
    A 0.35µm current-mode T/H with -81dB THD. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:1112-1115 [Conf]
  8. Gregory M. Cooley, Terri S. Fiez, Bryan Buchanan
    PWM and PCM Techniques for Control of Digitally Programmable Switching Power Supplies. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1114-1117 [Conf]
  9. Aria Eshraghi, Terri S. Fiez, Thomas R. Fischer
    Asynchronus Implementation for the Add Compare Select Processor for Communication Systems. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:253-256 [Conf]
  10. Sachin Ranganathan, Terri S. Fiez
    A variable gain high linearity low power baseband filter for WLAN. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:845-848 [Conf]
  11. Edmund M. Schneider, Terri S. Fiez
    Simulation of Switched-Current Systems. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1420-1423 [Conf]
  12. Ajit Sharma, Chenggang Xu, Wen Kung Chu, Nishath K. Verghese, Terri S. Fiez, Kartikeya Mayaram
    A predictive methodology for accurate substrate parasitic extraction. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:149-152 [Conf]
  13. Robert Shreeve, Terri S. Fiez, Kartikeya Mayaram
    A physical and analytical model for substrate noise coupling analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:157-160 [Conf]
  14. Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram
    An improved Z-parameter macro model for substrate noise coupling. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:161-164 [Conf]
  15. Ligang Zhang, Terry L. Sculley, Terri S. Fiez
    A 12 Bit, 2V Current-Mode Pipelined A/D Converter Nonlinearity. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:369-372 [Conf]
  16. Ravindranath Naiknaware, Terri S. Fiez
    Time-referenced single-path multi-bit Sigma-Delta ADC using a VCO based quantizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:33-36 [Conf]
  17. Ravindranath Naiknaware, Terri S. Fiez
    Switched-capacitor integrator design optimizing for power and process variations. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:278-281 [Conf]
  18. Anil Samavedam, Kartikeya Mayaram, Terri S. Fiez
    Design-oriented substrate noise coupling macromodels for heavily doped CMOS processes. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:218-221 [Conf]
  19. Husni M. Habal, Terri S. Fiez, Kartikeya Mayaram
    An accurate and efficient estimation of switching noise in synchronous digital circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:485-488 [Conf]
  20. R. Batten, Terri S. Fiez
    An efficient parallel delta-sigma ADC utilizing a shared multi-bit quantizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:715-718 [Conf]
  21. N. Barton, D. Ozis, Terri S. Fiez, Kartikeya Mayaram
    Analysis of jitter in ring oscillators due to deterministic noise. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:393-396 [Conf]
  22. Zhimin Li, Terri S. Fiez
    Dynamic element matching in low oversampling delta sigma ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:683-686 [Conf]
  23. D. Ozis, Kartikeya Mayaram, Terri S. Fiez
    An efficient modeling approach for substrate noise coupling analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:237-240 [Conf]
  24. Detlev Schmitt, Terri S. Fiez
    A low voltage CMOS current source. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1997, pp:110-113 [Conf]
  25. Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram
    Coupled Simulation of Circuit and Piezoelectric Laminates. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:369-372 [Conf]
  26. Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram
    On the numerical stability of Green's function for substrate coupling in integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:4, pp:653-658 [Journal]
  27. Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram
    An error control method for application of the discrete cosine transform to extraction of substrate parasitics in ICs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:5, pp:932-938 [Journal]
  28. Husni M. Habal, Kartikeya Mayaram, Terri S. Fiez
    Accurate and efficient simulation of synchronous digital switching noise in systems on a chip. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:3, pp:330-338 [Journal]
  29. Ajit Sharma, P. Birrer, S. K. Arunachalam, Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram
    Accurate Prediction of Substrate Parasitics in Heavily Doped CMOS Processes Using a Calibrated Boundary Element Solver. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:7, pp:843-851 [Journal]
  30. James Ayers, Kartikeya Mayaram, Terri S. Fiez
    A Low Power BFSK Super-Regenerative Transceiver. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3099-3102 [Conf]
  31. James Ayers, Kartikeya Mayaram, Terri S. Fiez
    Tradeoffs in the Design of CMOS Receivers for Low Power Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1345-1348 [Conf]

  32. Comparison of supply noise and substrate noise reduction in SiGe BiCMOS and FDSOI processes. [Citation Graph (, )][DBLP]


Search in 0.000secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002