Search the dblp DataBase

Publications of Author

1. Hakan Yalcin, Mohammad Mortazavi, Robert Palermo, Cyrus Bamji, Karem A. Sakallah
   Functional Timing Analysis for IP Characterization. [Citation Graph (0, 0)][DBLP]
   DAC, 1999, pp:731-736 [Conf]
   
2. Hakan Yalcin, Robert Palermo, Mohammad Mortazavi, Cyrus Bamji, Karem A. Sakallah, John P. Hayes
   An Advanced Timing Characterization Method Using Mode Dependency. [Citation Graph (0, 0)][DBLP]
   DAC, 2001, pp:657-660 [Conf]
   
3. Pawan Kulshreshtha, Robert Palermo, Mohammad Mortazavi, Cyrus Bamji, Hakan Yalcin
   Transistor-Level Timing Analysis Using Embedded Simulation. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2000, pp:344-348 [Conf]
   
4. Hakan Yalcin, John P. Hayes
   Hierarchical timing analysis using conditional delays. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1995, pp:371-377 [Conf]
   
5. Hakan Yalcin, John P. Hayes, Karem A. Sakallah
   An approximate timing analysis method for datapath circuits. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1996, pp:114-118 [Conf]
   
6. Mark C. Hansen, Hakan Yalcin, John P. Hayes
   Unveiling the ISCAS-85 Benchmarks: A Case Study in Reverse Engineering. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1999, v:16, n:3, pp:72-80 [Journal]
   
7. Hakan Yalcin, Mohammad Mortazavi, Robert Palermo, Cyrus Bamji, Karem A. Sakallah, John P. Hayes
   Fast and accurate timing characterization using functionalinformation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:2, pp:315-331 [Journal]
   
8. Hakan Yalcin, John P. Hayes
   Event propagation conditions in circuit delay computation. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 1997, v:2, n:3, pp:249-280 [Journal]