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Kai Zhu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kai Zhu, D. F. Wong
    Switch Bound Allocation for Maximizing Routability in Timing-Driven Routing of FPGAs. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:165-170 [Conf]
  2. Kai Zhu, D. F. Wong
    Clock Skew Minimization During FPGA Placement. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:232-237 [Conf]
  3. Kai Zhu
    Post-route LUT output polarity selection for timing optimization. [Citation Graph (0, 0)][DBLP]
    FPGA, 2007, pp:89-96 [Conf]
  4. Huiqun Liu, Kai Zhu, D. F. Wong
    Circuit Partitioning with Complex Resource Constraints in FPGAs. [Citation Graph (0, 0)][DBLP]
    FPGA, 1998, pp:77-84 [Conf]
  5. Yao-Wen Chang, Shashidhar Thakur, Kai Zhu, D. F. Wong
    A new global routing algorithm for FPGAs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:356-361 [Conf]
  6. Kai Zhu, D. F. Wong
    On channel segmentation design for row-based FPGAs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:26-29 [Conf]
  7. Kai Zhu, D. F. Wong, Yao-Wen Chang
    Switch module design with application to two-dimensional segmentation design. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:480-485 [Conf]
  8. Kai Zhu, Yan Zhuang, Yannis Viniotis
    Achieving End-to-end Delay Bounds by EDF Scheduling without Traffic Shaping. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 2001, pp:1493-1501 [Conf]
  9. Kai Zhu, Martin D. F. Wong
    Clock skew minimization during FPGA placement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:4, pp:376-385 [Journal]
  10. Kai Zhu, Martin D. F. Wong
    Switch bound allocation for maximizing routability in timing-driven routing of FPGA's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:4, pp:316-323 [Journal]
  11. Yao-Wen Chang, Kai Zhu, D. F. Wong
    Timing-driven routing for symmetrical array-based FPGAs. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2000, v:5, n:3, pp:433-450 [Journal]
  12. Yao-Wen Chang, Kai Zhu, Guang-Ming Wu, D. F. Wong, C. K. Wong
    Analysis of FPGA/FPIC switch modules. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2003, v:8, n:1, pp:11-37 [Journal]

  13. Ontology-Based Process Modeling Using eTOM and ITIL. [Citation Graph (, )][DBLP]


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