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Nripendra N. Biswas: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Prathima Agrawal, Vishwani D. Agrawal, Nripendra N. Biswas
    Multiple output minimization. [Citation Graph (0, 0)][DBLP]
    DAC, 1985, pp:674-680 [Conf]
  2. James Jacob, Nripendra N. Biswas
    : A Testable PLA Design with Minimal Hardware and Test Set. [Citation Graph (0, 0)][DBLP]
    ITC, 1985, pp:583-588 [Conf]
  3. K. S. Ramanatha, Nripendra N. Biswas
    A Design for Complete Testability of Programmable Logic Arrays. [Citation Graph (0, 0)][DBLP]
    ITC, 1982, pp:67-74 [Conf]
  4. Nripendra N. Biswas, C. Srikanth, James Jacob
    Cubical CAMP for minimization of Boolean functions. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:264-269 [Conf]
  5. Nripendra N. Biswas
    On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:11, pp:1057-1061 [Journal]
  6. Nripendra N. Biswas, Sampalli Srinivas
    A Reconfigurable Tree Architecture with Multistage Interconnection Network. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:12, pp:1481-1485 [Journal]
  7. James Jacob, Nripendra N. Biswas
    Further Comments on "Detection of Faults in Programmable Logic Arrays". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:1, pp:155-157 [Journal]
  8. Ayakannu Mathialagan, Nripendra N. Biswas
    Optimal Interconnections in the Design of Microprocessors and Digital Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:2, pp:145-149 [Journal]
  9. Ayakannu Mathialagan, Nripendra N. Biswas
    Bit Steering in the Minimization of Control Memory in Microprogrammed Digital Computers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:2, pp:144-147 [Journal]
  10. K. S. Ramanatha, Nripendra N. Biswas
    An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:5, pp:438-444 [Journal]
  11. K. S. Ramanatha, Nripendra N. Biswas
    A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:6, pp:551-557 [Journal]
  12. K. S. Ramanatha, Nripendra N. Biswas
    Design of Crosspoint-Irredundant PLA's Using Minimal Number of Control Inputs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:9, pp:1130-1134 [Journal]
  13. C. V. S. Rao, Nripendra N. Biswas
    Minimization of Incompletely Specified Sequential Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:11, pp:1089-1100 [Journal]
  14. C. V. S. Rao, Nripendra N. Biswas
    Further Comments on ``Closure Partition Method for Minimizing Incomplete Sequential Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1976, v:25, n:7, pp:767-768 [Journal]
  15. Chamarty D. V. P. Rao, Nripendra N. Biswas
    On the Minimization of Wordwidth in the Control Memory of a Microprogrammed Digital Computer. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:9, pp:863-868 [Journal]
  16. Anil K. Sarje, Nripendra N. Biswas
    An Algorithm for Testing 2-Asummability of Boolean Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1977, v:26, n:10, pp:1049-1053 [Journal]
  17. Anil K. Sarje, Nripendra N. Biswas
    A New Approach to 2-Asummability Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1979, v:28, n:10, pp:798-801 [Journal]
  18. Sampalli Srinivas, Nripendra N. Biswas
    Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:11, pp:1465-1478 [Journal]
  19. Nripendra N. Biswas
    Computer-Aided Minimization Procedure for Boolean Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:303-304 [Journal]
  20. Nripendra N. Biswas
    On covering distant minterms by the camp algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:7, pp:786-789 [Journal]
  21. B. Gurunath, Nripendra N. Biswas
    An algorithm for multiple output minimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:9, pp:1007-1013 [Journal]

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