The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Madhukar K. Reddy: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Madhukar K. Reddy, Sudhakar M. Reddy, Prathima Agrawal
    Transistor level test generation for MOS circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1985, pp:825-828 [Conf]
  2. David G. Kirkpatrick, Madhukar K. Reddy, C. Pandu Rangan, Anand Srinivasan
    Partial and Perfect Path Covers of Cographs. [Citation Graph (0, 0)][DBLP]
    Discrete Applied Mathematics, 1998, v:89, n:1-3, pp:143-153 [Journal]
  3. Sudhakar M. Reddy, Madhukar K. Reddy
    Testable Realizations for FET Stuck-Open Faults CMOS Combinational Logic Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:8, pp:742-754 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002