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Nevine AbouGhazaleh: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Daniel Mossé, Nevine AbouGhazaleh, Bruce R. Childers, Rami G. Melhem
Energy Conservation in Memory Hierarchies using Power-Aware Cached-DRAM. [Citation Graph (0, 0)][DBLP]
Power-aware Computing Systems, 2005, pp:- [Conf] - Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mossé, Rami G. Melhem
Near-memory Caching for Improved Energy Consumption. [Citation Graph (0, 0)][DBLP]
ICCD, 2005, pp:105-110 [Conf] - Dakai Zhu, Nevine AbouGhazaleh, Daniel Mossé, Rami G. Melhem
Power Aware Scheduling for AND/OR Graphs in Multi-Processor Real-Time Systems. [Citation Graph (0, 0)][DBLP]
ICPP, 2002, pp:593-601 [Conf] - Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mossé, Rami G. Melhem, Matthew Craven
Energy management for real-time embedded applications with compiler support. [Citation Graph (0, 0)][DBLP]
LCTES, 2003, pp:284-293 [Conf] - Nevine AbouGhazaleh, Daniel Mossé, Bruce R. Childers, Rami G. Melhem, Matthew Craven
Collaborative Operating System and Compiler Power Management for Real-Time Applications. [Citation Graph (0, 0)][DBLP]
IEEE Real Time Technology and Applications Symposium, 2003, pp:133-0 [Conf] - Nevine AbouGhazaleh, Yousry S. El Gamal
Compressed video indexing based on object motion. [Citation Graph (0, 0)][DBLP]
VCIP, 2000, pp:986-993 [Conf] - Nevine AbouGhazaleh, Daniel Mossé, Bruce R. Childers, Rami G. Melhem
Collaborative operating system and compiler power management for real-time applications. [Citation Graph (0, 0)][DBLP]
ACM Trans. Embedded Comput. Syst., 2006, v:5, n:1, pp:82-115 [Journal] - Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Rusu, Ruibin Xu, Frank Liberato, Bruce R. Childers, Daniel Mossé, Rami G. Melhem
Integrated CPU and l2 cache voltage scaling using machine learning. [Citation Graph (0, 0)][DBLP]
LCTES, 2007, pp:41-50 [Conf] - Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mossé, Rami G. Melhem
Near-Memory Caching for Improved Energy Consumption. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 2007, v:56, n:11, pp:1441-1455 [Journal]
Integrated CPU Cache Power Management in Multiple Clock Domain Processors. [Citation Graph (, )][DBLP]
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