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Tatsumi Furuya: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tetsuya Higuchi, Hiroaki Kitano, Tatsumi Furuya, Ken'ichi Handa, Akio Kokubu, Naoto Takahashi
    IXM2: A Parallel Associative Processor for Knowledge Processing. [Citation Graph (0, 0)][DBLP]
    AAAI, 1991, pp:296-303 [Conf]
  2. Tetsuya Higuchi, Tatsumi Furuya, Hiroyuki Kusumoto, Ken'ichi Handa, Akio Kokubu
    The IX Supercomputer for Knowledge-Based Systems. [Citation Graph (0, 0)][DBLP]
    FJCC, 1986, pp:1041-1048 [Conf]
  3. Yuji Sato, Shoji Hatano, Hisaaki Hatano, Tatsumi Furuya
    Lookahead Planning and Co-Evolution in Recurrent Neural Networks. [Citation Graph (0, 0)][DBLP]
    International Conference on Evolutionary Computation, 1994, pp:764-769 [Conf]
  4. Hirokazu Nosato, Yuji Kasai, Taro Itatani, Masahiro Murakawa, Tatsumi Furuya, Tetsuya Higuchi
    Evolvable Optical Systems and Their Applications. [Citation Graph (0, 0)][DBLP]
    ICES, 2001, pp:327-340 [Conf]
  5. Tetsuya Higuchi, Masaya Iwata, Isamu Kajitani, Hitoshi Iba, Yuji Hirao, Tatsumi Furuya, Bernard Manderick
    Evolvable Hardware and Its Applications to Pattern Recognition and Fault-Tolerant Systems. [Citation Graph (0, 0)][DBLP]
    Towards Evolvable Hardware, 1995, pp:118-135 [Conf]
  6. Hidetaka Ito, Tatsumi Furuya
    Memory-Based Neural Network and Its Application to a Mobile Robot with Evolutionary and Experience Learning. [Citation Graph (0, 0)][DBLP]
    ICES, 1996, pp:234-246 [Conf]
  7. Masahiro Murakawa, Kazuyuki Hiraoka, Tetsuya Higuchi, Tatsumi Furuya, Shuji Yoshizawa
    Adaptive Blind Equalization Using Bottleneck Networks Implemented by Evolvable Hardware. [Citation Graph (0, 0)][DBLP]
    ICONIP, 1998, pp:89-92 [Conf]
  8. Tetsuya Higuchi, Tatsumi Furuya, Hiroyuki Kusumoto, Ken'ichi Handa, Akio Kokubu
    The Prototype of a Semantic Network Machine IXM. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1989, pp:217-224 [Conf]
  9. Tetsuya Higuchi, Tatsumi Furuya, Ken'ichi Handa, Naoto Takahashi, Hiroyasu Nishiyama, Akio Kokubu
    IXM2: A Parallel Associative Processor. [Citation Graph (0, 0)][DBLP]
    ISCA, 1991, pp:22-31 [Conf]
  10. Nobuharu Murata, Tatsumi Furuya, Hirokazu Nosato, Masahiro Murakawa
    An Automatic Multi-objective Adjustment System for Optical Axes using Genetic Algorithms. [Citation Graph (0, 0)][DBLP]
    ISDA, 2005, pp:546-551 [Conf]
  11. Tatsumi Furuya, Tetsuya Higuchi, Hiroyuki Kusumoto, Ken'ichi Handa, Akio Kokubu
    Architectural Evaluation of a Semantic Network Machine. [Citation Graph (0, 0)][DBLP]
    IWDM, 1987, pp:544-556 [Conf]
  12. Hugo de Garis, Hitoshi Iba, Tatsumi Furuya
    Differentiable Chromosomes: The Genetic Programming of Switchable Shape-Genes. [Citation Graph (0, 0)][DBLP]
    PPSN, 1992, pp:495-504 [Conf]
  13. Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani, Tatsumi Furuya, Masaya Iwata, Tetsuya Higuchi
    Hardware Evolution at Function Level. [Citation Graph (0, 0)][DBLP]
    PPSN, 1996, pp:62-71 [Conf]
  14. Tetsuya Higuchi, Ken'ichi Handa, Naoto Takahashi, Tatsumi Furuya, Hitoshi Iida, Eiichiro Sumita, Kozo Oi, Hiroaki Kitano
    The IXM2 Parallel Associative Processor for AI. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1994, v:27, n:11, pp:53-63 [Journal]
  15. Tatsumi Furuya
    Neurocomputing R&D in Japan. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 1990, v:2, n:1, pp:29-34 [Journal]
  16. Nobuharu Murata, Hirokazu Nosato, Tatsumi Furuya, Masahiro Murakawa
    Robust and Efficient Multi-objective Automatic Adjustment for Optical Axes in Laser Systems Using Stochastic Binary Search Algorithm. [Citation Graph (0, 0)][DBLP]
    ICES, 2007, pp:343-354 [Conf]

  17. Post-Fabrication Clock-Timing Adjustment for Digital LSIs Ensuring Operational Timing Margins. [Citation Graph (, )][DBLP]


  18. Proposal for LDPC Code Design System Using Multi-Objective Optimization and FPGA-Based Emulation. [Citation Graph (, )][DBLP]


  19. World-Wide Accessible LDPC Encoder/Decoder Generator Using Web-Based GUI and API. [Citation Graph (, )][DBLP]


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