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Publications of Author

1. Stephen Bailey, Erich Marschner, Jayaram Bhasker, Jim Lewis, Peter J. Ashenden
   Improving Design and Verification Productivity with VHDL-200x. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:332-335 [Conf]
   
2. Peter J. Ashenden, Philip A. Wilsey
   Extensions to VHDL for Abstraction of Concurrency and Communication. [Citation Graph (0, 0)][DBLP]
   MASCOTS, 1998, pp:301-308 [Conf]
   
3. Peter J. Ashenden, Chris D. Marlin
   A Behavioural Specification of Cache Coherence. [Citation Graph (0, 0)][DBLP]
   Australian Computer Journal, 1988, v:20, n:2, pp:50-57 [Journal]
   
4. David L. Andrews, Douglas Niehaus, Peter J. Ashenden
   Programming Models for Hybrid CPU/FPGA Chips. [Citation Graph (0, 0)][DBLP]
   IEEE Computer, 2004, v:37, n:1, pp:118-120 [Journal]
   
5. Peter J. Ashenden
   VHDL Standards. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:122-123 [Journal]
   
6. Peter J. Ashenden
   What Makes a Good Standard? [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2002, v:19, n:3, pp:114-115 [Journal]
   
7. Peter J. Ashenden
   Standards: Technical activities in Accellera. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2002, v:19, n:6, pp:106- [Journal]
   
8. Peter J. Ashenden
   Boundary Scan Test Standards. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2003, v:20, n:1, pp:91-92 [Journal]
   
9. Peter J. Ashenden
   VHDL-200X: The Next Revision. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2003, v:20, n:3, pp:112-113 [Journal]
   
10. Peter J. Ashenden
    Policies and procedures - who needs them? [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:157-158 [Journal]
    
11. Peter J. Ashenden, Philip A. Wilsey
    Protected Shared Variables in VHDL: IEEE Standard 1076a. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:4, pp:74-83 [Journal]
    
12. Peter J. Ashenden, Philip A. Wilsey, Dale E. Martin
    SUAVE: Extending VHDL to Improve Data Modeling Support. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:34-44 [Journal]
    
13. David L. Andrews, Douglas Niehaus, Razali Jidin, Michael Finley, Wesley Peck, Michael Frisbie, Jorge L. Ortiz, Ed Komp, Peter J. Ashenden
    Programming Models for Hybrid FPGA-CPU Computational Components: A Missing Link. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:4, pp:42-53 [Journal]