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Publications of Author

1. Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani
   Extending JTAG for Testing Signal Integrity in SoCs. [Citation Graph (0, 0)][DBLP]
   DATE, 2003, pp:10218-10223 [Conf]
   
2. Mohammad H. Tehranipour, Mehrdad Nourani, Krishnendu Chakrabarty
   Nine-Coded Compression Technique with Application to Reduced Pin-Count Testing and Flexible On-Chip Decompression. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:1284-1289 [Conf]
   
3. Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani
   Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity. [Citation Graph (0, 0)][DBLP]
   ICCD, 2003, pp:554-0 [Conf]
   
4. Nisar Ahmed, Mohammad H. Tehranipour, Dian Zhou, Mehrdad Nourani
   Frequency driven repeater insertion for deep submicron. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2004, pp:181-184 [Conf]
   
5. G. R. Chaji, R. M. Pourrad, Seid Mehdi Fakhraie, Mohammad H. Tehranipour
   eUTDSP: a design study of a new VLIW-based DSP architecture. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2003, pp:137-140 [Conf]
   
6. Mohammad H. Tehranipour, Mehrdad Nourani, Seid Mehdi Fakhraie, Ali Afzali-Kusha
   Systematic test program generation for SoC testing using embedded processor. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2003, pp:541-544 [Conf]
   
7. Mohammad H. Tehranipour, Zainalabedin Navabi, Seid Mehdi Fakhraie
   An efficient BIST method for testing of embedded SRAMs. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2001, pp:73-76 [Conf]
   
8. Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani
   Low power pattern generation for BIST architecture. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:689-692 [Conf]
   
9. Mohammad H. Tehranipour, Mehrdad Nourani, Karim Arabi, Ali Afzali-Kusha
   Mixed RL-Huffman encoding for power reduction and data compression in scan test. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:681-684 [Conf]
   
10. Mohammad H. Tehranipour, Mehrdad Nourani
    Signal Integrity Loss in SoC's Interconnects: A Diagnosis Approach Using Embedded Microprocessor. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:1093-1102 [Conf]
    
11. Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani
    Testing SoC Interconnects for Signal Integrity Using Boundary Scan. [Citation Graph (0, 0)][DBLP]
    VTS, 2003, pp:158-172 [Conf]
    
12. Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani
    Testing SoC interconnects for signal integrity using extended JTAG architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:5, pp:800-811 [Journal]
    
13. Mehrdad Nourani, Mohammad H. Tehranipour
    RL-huffman encoding for test compression and power reduction in scan applications. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:1, pp:91-115 [Journal]