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Nastaran Baradaran: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Nastaran Baradaran, Pedro C. Diniz
    A Register Allocation Algorithm in the Presence of Scalar Replacement for Fine-Grain Configurable Architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:6-11 [Conf]
  2. Nastaran Baradaran, Joonseok Park, Pedro C. Diniz
    Data Reuse in Configurable Architectures with RAM Blocks: Extended Abstract. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:1113-1115 [Conf]
  3. Nastaran Baradaran, Pedro C. Diniz
    Compiler-Directed Design Space Exploration for Caching and Prefetching Data in High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    FPT, 2005, pp:233-240 [Conf]
  4. Nastaran Baradaran, Jacqueline Chame, Chun Chen, Pedro C. Diniz, Mary W. Hall, Yoon-Ju Lee, Bing Liu 0002, Robert F. Lucas
    ECO: An Empirical-Based Compilation and Optimization System. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:206- [Conf]
  5. Nastaran Baradaran, Pedro C. Diniz, Joonseok Park
    Extending the Applicability of Scalar Replacement to Multiple Induction Variables. [Citation Graph (0, 0)][DBLP]
    LCPC, 2004, pp:455-469 [Conf]
  6. Nastaran Baradaran, Pedro C. Diniz
    Memory Parallelism Using Custom Array Mapping to Heterogeneous Storage Structures. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]
  7. Nastaran Baradaran, Pedro C. Diniz
    A Register Allocation Algorithm in the Presence of Scalar Replacement for Fine-Grain Configurable Architectures [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]

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